Semiconductor device

Abstract

The semiconductor device includes a power transistor that is disposed between a first signal line, which is coupled to a first external terminal, and a second signal line, which is coupled to a second external terminal. A gate electrode of the power transistor is coupled to a third signal line. The semiconductor device further includes a clamp circuit that clamps a voltage between the first signal line and the third signal line, a first resistive element that is disposed between the third signal line and the second signal line, and a monitoring section that monitors a voltage between the third signal line and the second signal line. The clamp circuit is configured so that a clamp voltage can be changed. The monitoring section exercises control to decrease the clamp voltage when the voltage between the third signal line and the second signal line exceeds a predefined threshold value.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a first signal line coupled to a first external terminal;   a second signal line coupled to a second external terminal;   a third signal line;   a power transistor disposed between the first signal line and the second signal line, a gate electrode of the power transistor being coupled to the third signal line;   a first resistive element disposed between the third signal line and the second signal line;   a clamp circuit disposed to clamp a voltage between the first signal line and the third signal line, the clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the third signal line, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and   a monitoring circuit that monitors a gate voltage of the power transistor, the monitoring circuit including a first transistor having a gate electrode coupled to the third signal line, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line to generate a voltage in accordance with an input current, and a load element disposed between a drain electrode of the first transistor and the first signal line,   wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the voltage generation section includes a second resistive element series-coupled with more than one diode. 
     
     
         3 . The semiconductor device according to  claim 1 , and
 wherein a current path is formed by turning on the switch element, and   wherein the monitoring circuit decreases a clamp voltage of the clamp circuit, when the gate voltage of the power transistor exceeds a predefined threshold value, by forming a current path in parallel with one or more of the series-coupled diodes.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein the one or more of the series-coupled diodes include one or more Zener diodes. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the switch element is controlled in accordance with a potential difference across the load element. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the power transistor and the first transistor are the same type of transistor. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the power transistor is a DMOS transistor. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the first external terminal is a power supply terminal that receives a first power supply voltage, and
 wherein the second external terminal is a power supply terminal that receives a second power supply voltage lower than the first power supply voltage.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein the first external terminal is a signal terminal that inputs or outputs a signal, and
 wherein the second external terminal is a power supply terminal that receives a power supply voltage lower than a voltage supplied to the signal terminal.   
     
     
         10 . A semiconductor device comprising:
 a first signal line coupled to a first external terminal;   a second signal line coupled to a second external terminal;   a third signal line;   a power transistor disposed between the first signal line and the second signal line, a gate electrode of the power transistor being coupled to the third signal line;   a first resistive element disposed between the third signal line and the second signal line;   a clamp circuit disposed between the first signal line and the third signal line to clamp a voltage between the first signal line and the third signal line, the clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the third signal line, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and   a monitoring circuit that monitors a gate voltage of the power transistor, the monitoring circuit including a first transistor having a gate electrode coupled to the third signal line, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line to generate a voltage in accordance with an input current, and a load element disposed between a drain electrode of the first transistor and the first signal line; and   a drive voltage generation circuit that outputs a drive voltage for driving the power transistor to the third signal line in accordance with a control signal,   wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor.   
     
     
         11 . The semiconductor device according to  claim 10 ,
 wherein a current path is formed by turning on the switch element,   wherein the monitoring circuit decreases a clamp voltage of the clamp circuit by switching the clamp voltage from a first voltage to a lower second voltage, and   wherein the second voltage is adjusted so that the voltage developed between the first signal line and the second signal line after switching is higher than an absolute maximum rating of the power transistor.   
     
     
         12 . The semiconductor device according to  claim 11 , further comprising:
 an overvoltage detection circuit that activates a detection signal when the voltage between the first signal line and the second signal line is higher than a predetermined voltage, and   wherein, when the detection signal is activated, the drive voltage generation circuit stops the output of the drive voltage.   
     
     
         13 . The semiconductor device according to  claim 10 , further comprising:
 wherein the drive voltage generation circuit includes a first transistor, a second transistor, a first switch coupled between a power supply and a source of the first transistor, and a second switch coupled between ground and a source of the second transistor, and   wherein a drain of the first transistor and a drain of the second transistor are coupled to the third signal line.   
     
     
         14 . The semiconductor device according to  claim 10 , further comprising: an overvoltage detection circuit that activates a detection signal when the voltage between the first signal line and the second signal line is higher than a predetermined voltage. 
     
     
         15 . The semiconductor device according to  claim 14 , wherein:
 wherein the load element is a third resistive element,   wherein the overvoltage detection circuit includes a switch control circuit, a fourth resistive element and a fifth resistive element, and   wherein the fourth resistive element and the fifth resistive element are series-coupled between the series-coupled diodes and the second signal line.   
     
     
         16 . The semiconductor device according to  claim 15 , further comprising:
 wherein, when the detection signal is activated, the drive voltage generation circuit stops the output of the drive voltage wherein the switch control circuit controls the first switch and the second switch of the drive voltage generation circuit according to a voltage between the fourth resistive element and the fifth resistive element.   
     
     
         17 . The semiconductor device according to  claim 16 , wherein, when the voltage between the first signal line and the second signal line is lower than the predetermined voltage, the switch control circuit turns on the first switch and second switch, and
 wherein, when the voltage between the first signal line and the second signal line is higher than the predetermined voltage, the switch control circuit turns off the first switch and second switch.   
     
     
         18 . A semiconductor device comprising:
 a first signal line;   a second signal line;   a power transistor disposed between the first signal line and the second signal line;   a first resistive element coupled between a gate electrode of the power transistor and the second signal line;   a clamp circuit including a plurality of series-coupled diodes coupled between the first signal line and the gate electrode of the power transistor, and a switch element coupled between the first signal line and one or more of the series-coupled diodes; and   a monitoring circuit including a first transistor having a gate electrode coupled to the gate electrode of the power transistor, a voltage generation section that is coupled between a source electrode of the first transistor and the second signal line, and a load element disposed between a drain electrode of the first transistor and the first signal line,   wherein a gate of the switch element is coupled between the load element and the drain electrode of the first transistor.   
     
     
         19 . The semiconductor device according to  claim 18 ,
 wherein the voltage generation section includes a second resistive element and one or more diodes series-coupled between the source electrode of the first transistor and the second signal line,   
     
     
         20 . The semiconductor device according to  claim 18 , wherein, when a voltage at the gate electrode of the power transistor exceeds a predefined threshold value, the monitoring circuit turns the switch element on and a current flows to the power transistor, and
 wherein a voltage across the load element controls the switch element.