Floating Body Transistor Constructions, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions

Abstract

The invention includes floating body transistor constructions containing U-shaped semiconductor material slices. The U-shapes have a pair of prongs joined to a central portion. Each of the prongs contains a source/drain region of a pair of gatedly-coupled source/drain regions, and the floating bodies of the transistors are within the central portions. The semiconductor material slices can be between front gates and back gates. The floating body transistor constructions can be incorporated into memory arrays, which in turn can be incorporated into electronic systems. The invention also includes methods of forming floating body transistor constructions, and methods of incorporating floating body transistor constructions into memory arrays.

The invention claimed is: 
     
         1 . A semiconductor construction comprising:
 a series of electrically conductive plates; the plates alternating between front gate plates and back gate plates; and   a plurality of expanses of trough-shaped semiconductor material; individual expanses being between front gate plates and back gate plates; the individual expanses comprising a pair of upwardly-projecting sidewalls joining to a central valley portion; the sidewalls comprising transistor source/drain regions and the central portions comprising floating body regions of floating body transistors.   
     
     
         2 . The construction of  claim 1  wherein:
 the floating body transistors are within a memory array; 
 at least some of the individual front gates are shared between pairs of floating body transistors on opposing sides of the individual front gate plates; and 
 at least some of the individual back gates are shared between pairs of floating body transistors on opposing sides of the individual back gate plates. 
 
     
     
         3 . The construction of  claim 1  further comprising electrically insulative material filling the troughs of the trough-shaped expanses. 
     
     
         4 . The construction of  claim 3  wherein the insulative material comprises silicon dioxide. 
     
     
         5 . The construction of  claim 3  wherein the insulative material consists of silicon dioxide. 
     
     
         6 . The construction of  claim 1  wherein the semiconductor material comprises monocrystalline silicon. 
     
     
         7 . The construction of  claim 1  wherein the front gate plates are separated from the semiconductor material by first gate dielectric; wherein the back gate plates are separated from the semiconductor material be second gate dielectric; and wherein the first and second gate dielectrics are the same composition as one another. 
     
     
         8 . The construction of  claim 7  wherein the first and second gate dielectrics include silicon dioxide. 
     
     
         9 . The construction of  claim 7  wherein the first and second gate dielectrics consist of silicon dioxide. 
     
     
         10 . The construction of  claim 1  wherein the back gate plates are the same composition as the front gate plates. 
     
     
         11 . The construction of  claim 1  wherein the back gate plates are the same composition as the front gate plates; and wherein the plates comprise one or more metals. 
     
     
         12 . The construction of  claim 1  wherein the back gate plates are the same composition as the front gate plates; and wherein the plates comprise one or more of titanium, ruthenium and titanium nitride. 
     
     
         13 . A semiconductor construction comprising:
 a series of electrically conductive plates; the plates alternating between front gate plates and back gate plates;   an array of floating body transistors, with columns of the transistor array being between front gate plates and back gate plates; each of the individual transistors along the columns having a source region and a drain region; the source and drain regions of the transistors alternating with one another along the columns of the array; and   the source regions being tied to one another along diagonals extending about 45 degrees to the columns of the array.   
     
     
         14 . The construction of  claim 13  wherein the transistors comprise expanses of trough-shaped semiconductor material; individual expanses being between front gate plates and back gate plates; the individual expanses comprising a pair of upwardly-projecting sidewalls joining to a central valley portion; the sidewalls comprising the transistor source and drain regions, and the central portions comprising floating body regions of the floating body transistors. 
     
     
         15 . A semiconductor construction comprising:
 a series of electrically conductive plates; the plates alternating between front gate plates and back gate plates; and   a plurality of expanses of trough-shaped semiconductor material; individual expanses being between front gate plates and back gate plates; the individual expanses comprising a pair of upwardly-projecting sidewalls joining to a central valley portion; the sidewalls comprising transistor source/drain regions and the central portions comprising floating body regions of floating body transistors, the floating body transistors being each adjacent floating body transistor by a trench extending below the central valley portion.   
     
     
         16 . The construction of  claim 15  wherein:
 the floating body transistors are within a memory array; and 
 at least some of the individual front gates being shared between pairs of floating body transistors on opposing sides of the individual front gate plates. 
 
     
     
         17 . The construction of  claim 15  further comprising electrically insulative material filling the troughs of the trough-shaped expanses. 
     
     
         18 . The construction of  claim 15  wherein the trench is filled with an electrically insulative material. 
     
     
         19 . The construction of  claim 15  wherein the trench extends into insulative material of a semiconductor-on-insulator construction. 
     
     
         20 . The construction of  claim 15  wherein the front gate plates and the back gate plates comprise one or more metals.