US2015137333A1PendingUtilityA1

Methods of selectively forming a material using a parylene coating and related semiconductor structures

Assignee: MICRON TECHNOLOGY INCPriority: Aug 31, 2010Filed: Dec 8, 2014Published: May 21, 2015
Est. expiryAug 31, 2030(~4.1 yrs left)· nominal 20-yr term from priority
Inventors:Eugene P. Marsh
H10P 14/69397H10P 14/69396H10P 14/69394H10P 14/69392H10P 14/6939H10P 14/6506H10P 14/6339H10P 14/432H10P 14/412H10W 20/057H10P 14/683C23C 16/0227H01L 21/02181H01L 21/02186H01L 21/02194H01L 21/02118H01L 21/02192H01L 21/0228H01L 21/32051C23C 16/045C23C 16/042C23C 16/45534
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Claims

Abstract

Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor structure comprising:
 an intermediate material overlying a substrate, the intermediate material comprising at least one recess therethrough and exposing top surfaces of the substrate;   a blocking material over sidewalls of the intermediate material but not over the top surfaces of the substrate;   a first metal material over the top surfaces of the substrate but not over the blocking material; and   a parylene coating over the blocking material but not over the first metal material.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein the first metal material comprises at least one material selected from the group consisting of platinum, gold, silver, nickel, copper, iridium, tungsten, thallium, and titanium. 
     
     
         3 . The semiconductor structure of  claim 1 , further comprising a second metal material over the first metal material but not over the parylene coating. 
     
     
         4 . The semiconductor structure of  claim 1 , wherein the second metal materials comprises at least one material selected from the group consisting of platinum, gold, silver, nickel, copper, iridium, tungsten, thallium, and titanium. 
     
     
         5 . The semiconductor structure of  claim 1 , wherein the blocking material comprises a material selected from the group consisting of a resist material, a polymeric material, and an amphiphilic material. 
     
     
         6 . The semiconductor structure of  claim 1 , wherein the blocking material comprises at least one of a chloroalkyl compound, a chloroalkene, a 1-alkene, and a 1-alkyne. 
     
     
         7 . The semiconductor structure of  claim 1 , wherein the blocking material comprises at least one of a photoresist material, polymethylglutarimide (PMGI), polyethylene, polystyrene, polyurethane, poly(methyl methacrylate) (PMMA), phenol formaldehyde, a novolac polycresole, a polyimide, and a fluoro resin. 
     
     
         8 . The semiconductor structure of  claim 1 , wherein the blocking material comprises at least one of octadecyltrichlorosilane (ODTS), dodecyltrichlorosilane, methylchlorosilane, and tridecafluoro-1,1,2,2-tetrahydrooctyltrichloro-silane (FOTS). 
     
     
         9 . The semiconductor structure of  claim 1 , wherein the parylene coating comprises a substituted [2.2]paracyclophane. 
     
     
         10 . The semiconductor structure of  claim 3 , further comprising a third metal material over the second metal material but not over the parylene coating. 
     
     
         11 . The semiconductor structure of  claim 10 , wherein each of the first, second and third metal materials comprises the same material. 
     
     
         12 . A method of selectively forming a material, the method comprising:
 forming a first material by atomic layer deposition on at least one surface of a substrate exposed between portions of a blocking material;   forming a parylene coating over the blocking material without forming the parylene coating on the first material; and   forming a second material by atomic layer deposition on the first material without forming the second material on the parylene coating.   
     
     
         13 . The method of  claim 12 , wherein forming a first material by atomic layer deposition on at least one surface of a substrate exposed between portions of a blocking material comprises forming a material selected from the group consisting of platinum, hafnium oxide, copper, titanium dioxide, nickel, molybdenum, zinc sulfide, gallium arsenide, indium phosphide, tin dioxide, magnesium oxide, nickel oxide, iridium, ruthenium, iridium dioxide, ruthenium oxide, barium strontium titanate (Ba 1-x Sr x TiO 3 ,), lead zirconate titanate ((Pb[Zr x Ti 1-x ]O 3 ), germanium-antimony-tellurium (Ge 2 Sb 2 Te 2 ), germanium sulfide, and copper telluride. 
     
     
         14 . The method of  claim 12 , wherein forming a first material by atomic layer deposition on at least one surface of a substrate exposed between portions of a blocking material comprises forming a material configured to inhibit formation of a parylene coating thereon. 
     
     
         15 . The method of  claim 14 , wherein forming a material configured to inhibit formation of a parylene coating thereon comprises forming a material selected from the group consisting of platinum, gold, silver, nickel, copper, iridium, tungsten, tantalum, and titanium. 
     
     
         16 . The method of  claim 12 , wherein forming a second material by atomic layer deposition on the first material without forming the second material on the parylene coating comprises forming the second material comprising the same material as the first material. 
     
     
         17 . The method of  claim 12 , wherein forming a second material by atomic layer deposition on the first material without forming the second material on the parylene coating comprises forming the second material comprising a different material from the first material. 
     
     
         18 . The method of  claim 12 , wherein forming a parylene coating over the blocking material without forming the parylene coating on the first material comprises exposing the blocking material to a parylene in a sublimed or vapor state after forming the first material by atomic layer deposition. 
     
     
         19 . The method of  claim 12 , further comprising forming a third material by atomic layer deposition on the second material without forming the third material on the parylene coating, wherein the third material comprises the same material as the second material.

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