Superior integrity of a high-k gate stack by forming a controlled undercut on the basis of a wet chemistry

Abstract

A transistor device includes a gate electrode structure. The gate electrode structure includes a high-k gate insulation layer, a metal-containing first electrode material positioned above the high-k gate insulation layer, and a second electrode material positioned above the metal-containing first electrode material. The high-k gate insulation layer has a length that is less than a length of the second electrode material.

1 .- 18 . (canceled) 
     
     
         19 . A transistor device, comprising:
 a gate electrode structure comprising a high-k gate insulation layer, a metal-containing first electrode material positioned above said high-k gate insulation layer and a second electrode material positioned above said metal-containing first electrode material, said high-k gate insulation layer having a length that is less than a length of said second electrode material.   
     
     
         20 . The transistor device of  claim 19 , wherein a length of said metal-containing first electrode material is less than said length of said second electrode material. 
     
     
         21 . The transistor device of  claim 19 , wherein said metal-containing first electrode material comprises titanium. 
     
     
         22 . The transistor device of  claim 19 , wherein said high-k gate insulation layer comprises one of lanthanum and aluminum. 
     
     
         23 . The transistor device of  claim 19 , wherein a sidewall surface of said high-k gate insulation layer and a bottom surface of said second electrode material at least partially define an undercut area of said gate electrode structure that is positioned laterally adjacent to said high-k gate insulation layer and below said second electrode material. 
     
     
         24 . The transistor device of  claim 23 , wherein a sidewall surface of said metal-containing first electrode material further defines said undercut area. 
     
     
         25 . The transistor device of  claim 23 , further comprising a protective liner positioned adjacent to sidewalls of said gate electrode structure, said protective liner filling said undercut area. 
     
     
         26 . The transistor device of  claim 19 , wherein said second electrode material comprises a semiconductor-based material. 
     
     
         27 . The transistor device of  claim 26 , wherein said semiconductor-based material comprises at least one of amorphous silicon and polysilicon. 
     
     
         28 . The transistor device of  claim 26 , wherein said semiconductor-based material comprises one of germanium and a silicon/germanium mixture. 
     
     
         29 . The transistor device of  claim 19 , further comprising a metal silicide electrode material positioned above said second electrode material, wherein a length of said metal silicide electrode material is greater than said length of said high-k gate insulation layer. 
     
     
         30 . A gate electrode structure of a transistor device, the gate electrode structure comprising:
 a gate insulation material layer positioned above a channel region of said transistor device;   a first gate electrode material layer positioned above said gate insulation material layer; and   a second gate electrode material layer positioned above said first gate electrode material layer, wherein a bottom surface of said second gate electrode material layer overhangs a sidewall surface of at least one of said gate insulation material layer and said first gate electrode material layer so as to at least partially define an undercut area of said gate electrode structure that is positioned laterally adjacent to said at least one of said gate insulation material layer and said first gate electrode material layer and below said second gate electrode material layer.   
     
     
         31 . The gate electrode structure of  claim 30 , wherein a lateral length of said second gate electrode material layer is greater than a lateral length of at least one of said first gate electrode material layer and said gate insulation material layer. 
     
     
         32 . The gate electrode structure of  claim 30 , wherein a lateral length of said second gate electrode material layer is greater than a lateral length of each of said first gate electrode material layer and said gate insulation material layer. 
     
     
         33 . The gate electrode structure of  claim 31 , wherein said first gate electrode material layer comprises a conductive metal material. 
     
     
         34 . The gate electrode structure of  claim 31 , wherein said second gate electrode material layer comprises a semiconductor-based material. 
     
     
         35 . The gate electrode structure of  claim 31 , wherein said gate insulation material layer comprises a high-k dielectric material. 
     
     
         36 . The gate electrode structure of  claim 31 , wherein said gate insulation material layer comprises at least a first sub-layer and a second sub-layer positioned above said first sub-layer, said first sub-layer comprising a silicon dioxide material and said second sub-layer comprising a high-k dielectric material. 
     
     
         37 . A gate electrode structure of a transistor device, the gate electrode structure comprising:
 a first gate electrode material layer comprising a semiconductor-based material and having a first lateral length;   a second gate electrode material layer positioned below said first gate electrode material layer, said second gate electrode material layer comprising a conductive metal material and having a second lateral length that is less than said first lateral length; and   a gate insulation material layer positioned between said second gate electrode material layer and a channel region of said transistor device, said gate insulation material layer comprising a high-k dielectric material and having a third lateral length that is less than said first lateral length.   
     
     
         38 . The gate electrode structure of  claim 37 , further comprising a third gate electrode material layer positioned above said first gate electrode material layer, said gate insulation material layer comprising a conductive metal silicide material and having a fourth lateral length that is greater than said second and third lateral lengths.