US2015123274A1PendingUtilityA1

Semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: Jul 15, 2009Filed: Jan 14, 2015Published: May 7, 2015
Est. expiryJul 15, 2029(~2.9 yrs left)· nominal 20-yr term from priority
Inventors:Hidenori Egawa
H10W 72/252H10W 72/072H10W 72/20H10W 72/00H10W 70/688H10W 70/65H10W 70/60H10W 40/255H10W 40/00H01L 23/12H01L 23/50H01L 23/34H01L 24/17
50
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device includes a substantially rectangular semiconductor chip having an obverse surface, a first long side, a second long side opposite the first long side, a first short side and a second short side, and a plurality of bump electrodes. A wiring substrate has a main surface, a first side disposed outside of the semiconductor chip and extending substantially parallel with the first long side, a second side disposed outside of the semiconductor chip and extending substantially parallel with the second long side, and a plurality of wiring groups, each including a plurality of wirings. A semiconductor chip is mounted on the wiring substrate such that the obverse surface of the semiconductor chip is faced to the main surface of the wiring substrate and the first long side is located between the first side of the wiring substrate and the second long side, in a plan view.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor chip of a substantially rectangular shape having an obverse surface, a first long side, a second long side opposite the first long side, a first short side and a second short side, which intersect the first and second long sides, and a plurality of bump electrodes formed on the obverse surface,
 the plurality of bump electrodes including first bump electrodes arranged along the first long side, second bump electrodes arranged along the first long side and arranged closer to the first short side than the first bump electrodes, third bump electrodes arranged along the first long side and arranged closer to the second short side than the first bump electrodes; and 
   a wiring substrate having a main surface, a first side disposed outside of the semiconductor chip and extending substantially parallel with the first long side of the semiconductor chip, a second side disposed outside of the semiconductor chip and extending substantially parallel with the second long side of the semiconductor chip, and a plurality of wiring groups, each said wiring group including a plurality of wirings formed on the main surface thereof, the semiconductor chip being mounted on the wiring substrate such that the obverse surface of the semiconductor chip is faced to the main surface of the wiring substrate and the first long side of the semiconductor chip is located between the first side of the wiring substrate and the second long side of the semiconductor chip, in a plan view,
 the plurality of wiring groups including a first wiring group, a second wiring group, and a third wiring group, 
 the first wiring group including first wirings, for heat dissipation, whose one end portions are electrically and mechanically connected to respective ones of the first bump electrodes, 
 the second wiring group including second wirings, for signals, whose one end portions are electrically connected to respective ones of the second bump electrodes, 
 the third wiring group including third wirings, for signals, whose one end portions are electrically connected to respective ones of the third bump electrodes, 
 the first wirings being extended from the first long side of the semiconductor chip toward the first side of the wiring substrate, and each of the other end portions of the first wirings being terminated between the first long side of the semiconductor chip and the first side of the wiring substrate, in the plan view 
 the second and third wirings being extended from the first long side of the semiconductor chip toward the first side of the wiring substrate, in the plan view, 
 wherein the first wiring group further includes a wiring pattern for power supply, whose one portions are electrically connected to respective ones of the first bump electrodes, 
 wherein one end portions of the first wirings are arranged between the one portions of the wiring pattern, and 
   wherein, in the plan view, the second and third wiring groups are arranged to surround the first wiring group.

Join the waitlist — get patent alerts

Track US2015123274A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.