Method for manufacturing a chip arrangement, and chip arrangement

Abstract

A method for manufacturing a chip arrangement in accordance with various embodiments may include: placing a chip on a carrier within an opening of a metal structure disposed over the carrier; fixing the chip to the metal structure; removing the carrier to thereby expose at least one contact of the chip; and forming an electrically conductive connection between the at least one contact of the chip and the metal structure.

What is claimed is: 
     
         1 . A chip arrangement, comprising:
 a chip disposed within an opening of a metal structure, the chip comprising one or more contacts;   wherein at least one contact of the chip is electrically connected to the metal structure, and wherein a surface of the chip is at least substantially flush with a surface of the metal structure.   
     
     
         2 . The chip arrangement of  claim 1 , wherein the at least one contact is located at a front side of the chip and is electrically connected to a front side of the metal structure. 
     
     
         3 . The chip arrangement of  claim 2 , wherein the at least one contact located at the front side is electrically connected to the front side of the metal structure through an electrically conductive structure. 
     
     
         4 . The chip arrangement of  claim 3 , wherein the electrically conductive structure comprises at least one via contacting the at least one contact located at the front side of the chip. 
     
     
         5 . The chip arrangement of  claim 4 , wherein the electrically conductive structure comprises at least one via contacting the front side of the metal structure. 
     
     
         6 . The chip arrangement of  claim 5 , wherein the least one via contacting the at least one contact located at the front side of the chip and the at least one via contacting at least part of the front side of the metal structure have substantially equal depth. 
     
     
         7 . The chip arrangement of  claim 3 , wherein the electrically conductive structure comprises an electrically conductive layer. 
     
     
         8 . The chip arrangement of  claim 1 , wherein the at least one of the one or more contacts of the chips is located at a back side of the chip and is electrically connected to a back side of the metal structure. 
     
     
         9 . The chip arrangement of  claim 8 , wherein the at least one contact located at the back side of the chip is electrically connected to the front side of the metal structure via an electrically conductive layer. 
     
     
         10 . The chip arrangement of  claim 9 , further comprising an adhesive located between the electrically conductive layer and the at least one contact located at the back side of the chip. 
     
     
         11 . The chip arrangement of  claim 1 , wherein the chip is affixed to the metal structure. 
     
     
         12 . The chip arrangement of  claim 11 , wherein the chip is affixed to the metal structure by an insulating material. 
     
     
         13 . The chip arrangement of  claim 1 , wherein metal structure comprises a metal selected from the consisting of copper, aluminum, and nickel. 
     
     
         14 . The chip arrangement of  claim 13 , wherein the metal structure comprises a metal alloy containing a metal selected from the consisting of copper, aluminum, and nickel.