Frequency agile filter using a digital filter and bandstop filtering

Abstract

A method of providing frequency dependent signal attenuation. An RF input signal is split into a first signal portion and a second signal portion. Discrete time filtering, a negative group delay and bandstop filtering are applied to the first signal portion to provide a filtered signal portion. The second signal portion is applied to a component, and a component output signal portion is received from the component. The component output signal portion is combined with the filtered signal portion to provide an RF output signal having frequency dependent attenuation.

What is claimed is: 
     
         1 . A multiband, frequency agile radio architecture, comprising:
 at least one radio frequency (RF) signal path;   at least one digital signal processing path configured to apply discrete-time filtering and negative group delay to a signal on the digital signal processing path to produce a compensation signal;   at least one splitter configured to couple a transmit RF signal to the at least one RF signal path and to the at least one digital signal processing path; and   at least one signal combiner configured to couple the compensation signal from the digital signal processing path to the RF signal path.   
     
     
         2 . The architecture of  claim 1 , wherein the at least one digital signal processing path is configured to apply the negative group delay by applying the negative group delay at frequencies where attenuation is desired. 
     
     
         3 . The architecture of  claim 1 , wherein the digital signal processing path is configured to apply the negative group delay after applying the discrete-time filtering and before applying bandstop filtering. 
     
     
         4 . The architecture of  claim 1 , wherein the digital signal processing path comprises a negative group delay element, the negative group delay element comprising:
 a time delay element connected between the first directional coupler and the second directional coupler on the first signal path; and   a phase shifter and an amplifier connected between the second directional coupler and the first directional coupler on the second signal path.   
     
     
         5 . The architecture of  claim 4 , wherein the phase shifter is a variable phase shifter and the amplifier is a variable gain amplifier. 
     
     
         6 . The architecture of  claim 1 , wherein the digital signal processing path comprises a discrete-time filter having an independently tunable transfer function zero and pole. 
     
     
         7 . The architecture of  claim 6 , wherein the discrete-time filter comprises:
 a down converter configured to down convert a portion of the transmit RF signal to provide a down converted signal portion;   a discrete-time filter element configured to discrete-time filter the down converted signal portion to provide a discrete-time filtered signal portion; and   an up converter configured to up convert the discrete-time filtered signal portion.   
     
     
         8 . The architecture of  claim 6 , wherein the digital signal processing path comprises a band stop filter. 
     
     
         9 . The architecture of  claim 6 , wherein the digital signal processing path is configured to apply discrete-time filtering before applying band stop filtering. 
     
     
         10 . The architecture of  claim 6 , wherein the digital signal processing path is configured to control the discrete-time filter responsive to an RF output signal on the RF signal path. 
     
     
         11 . The architecture of  claim 10 , wherein controlling the discrete-time filter responsive to the RF output signal comprises controlling frequency dependent cancellation of the discrete-time filter responsive to the RF output signal. 
     
     
         12 . The architecture of  claim 10 , wherein controlling the discrete-time filtering responsive to the RF output signal comprises:
 splitting off a portion of the RF output signal to provide an RF output signal portion; and   controlling the discrete time filtering responsive to the RF output signal portion.   
     
     
         13 . The architecture of  claim 12 , wherein controlling the discrete time filtering responsive to the RF output signal portion further comprises:
 down converting the RF output signal portion to provide a down converted output signal portion; and   controlling the discrete-time filtering responsive to the down converted output signal portion.   
     
     
         14 . The architecture of  claim 13 , wherein controlling the discrete-time filtering responsive to the down converted output signal portion comprises:
 providing the down converted output signal portion to a controller;   processing the down converted output signal in the controller to provide a control signal; and   providing the control signal to the discrete-time filter.   
     
     
         15 . The architecture of  claim 12 , wherein splitting off a portion of the RF output signal comprises splitting off a portion of the RF output signal at a directional coupler. 
     
     
         16 . The architecture of  claim 9 , wherein the RF signal path provides an RF output signal to an RF amplifier of an RF receiver. 
     
     
         17 . The architecture of  claim 16 , wherein the RF amplifier is a linear low noise amplifier. 
     
     
         18 . The architecture of  claim 16 , wherein the transmission line introduces a time delay. 
     
     
         19 . The architecture of  claim 1 , wherein the at least one splitter is at least one directional coupler. 
     
     
         20 . The architecture of  claim 1 , wherein the at least one signal combiner comprises at least one directional coupler.