High performance interconnect coherence protocol

Abstract

A request is received that is to reference a first agent and to request a particular line of memory to be cached in an exclusive state. A snoop request is sent intended for one or more other agents. A snoop response is received that is to reference a second agent, the snoop response to include a writeback to memory of a modified cache line that is to correspond to the particular line of memory. A complete is sent to be addressed to the first agent, wherein the complete is to include data of the particular line of memory based on the writeback.

1 - 73 . (canceled) 
     
     
         74 . An apparatus comprising:
 protocol circuitry to:
 identify that a directory state of a home agent for at least one line comprises an unknown state; 
 send a snoop to a coherence agent; 
 receive, from the coherence agent, a response with implicit writeback in response to the snoop; and 
 set the directory to an invalid state based on the response with implicit writeback. 
   
     
     
         75 . The apparatus of  claim 74 , wherein the protocol circuitry is further to determine that no other agent has a copy of a corresponding line based on the response with implicit writeback. 
     
     
         76 . The apparatus of  claim 74 , wherein the protocol circuitry is further to wait until a corresponding write to memory completes before sending a corresponding completion response. 
     
     
         77 . The apparatus of  claim 76 , wherein the completion response comprises data. 
     
     
         78 . The apparatus of  claim 76 , wherein the protocol circuitry is further to release a transaction resource associated with a request. 
     
     
         79 . The apparatus of  claim 78 , wherein the request comprises a request from another coherence agent. 
     
     
         80 . The apparatus of  claim 76 , wherein the protocol circuitry is to send the completion response in response to a request from another coherence agent. 
     
     
         81 . The apparatus of  claim 80 , wherein the request comprises a read invalidate request. 
     
     
         82 . The apparatus of  claim 80 , wherein the completion is to the other coherence agent. 
     
     
         83 . The apparatus of  claim 82 , wherein the completion causes a state of a cache line of the other coherence agent to transition from invalid to exclusive. 
     
     
         84 . The apparatus of  claim 83 , wherein a corresponding cache line of the coherence agent comprises a modified copy. 
     
     
         85 . The apparatus of  claim 74 , wherein the snoop comprises a snoop invalidate. 
     
     
         86 . The apparatus of  claim 85 , wherein the snoop invalidate causes a cache line to transition to invalid. 
     
     
         87 . The apparatus of  claim 74 , wherein the protocol circuitry is to write data to memory in response to implicit writeback. 
     
     
         88 . An apparatus comprising:
 protocol circuitry to:
 receive a read invalidate from a first coherence agent; 
 identify that a directory of the home agent is in an unknown state; 
 send a snoop invalidate to a second coherence agent; 
 receive, from the second coherence agent, a response with implicit writeback in response to the snoop invalidate; 
 set the directory to an invalid state based on the response with implicit writeback; 
 send a corresponding completion response to the first coherence agent upon completion of a corresponding write to memory; and 
 release a transaction resource corresponding to the read invalidate. 
   
     
     
         89 . An apparatus comprising:
 a transmitter to send a read invalidate request to a home agent, wherein the read invalidate request is to correspond to a particular cache line of a coherence agent and a state of the coherency agent for the particular cache line comprises an invalid state;   a receiver to receive a completion response from the home agent; and   state machine logic to transition the state of the particular cache line from invalid to exclusive based on the completion response.   
     
     
         90 . The apparatus of  claim 89 , wherein the completion indicates that the particular cache line is to be transitioned to exclusive. 
     
     
         91 . A method comprising:
 identifying that a directory of a home agent is in an unknown state;   sending a snoop invalidate to a coherence agent;   receiving, from the coherence agent, a response with implicit writeback in response to the snoop invalidate; and   set the directory to an invalid state based on the response with implicit writeback.   
     
     
         92 . The method of  claim 91 , wherein the coherence agent is a first coherence agent, the method further comprises receiving a read invalidate request from a second coherence agent, and the directory is identified in an unknown state in response to the read invalidate request. 
     
     
         93 . The method of  claim 92 , further comprising sending a corresponding completion response to the second coherence agent upon completion of a corresponding write to memory. 
     
     
         94 . The method of  claim 93 , further comprising releasing a transaction resource corresponding to the read invalidate request. 
     
     
         95 . A system comprising:
 a first node comprising a first coherence agent;   a second node comprising a second coherence agent; and   a home agent to:
 receive a request from the first coherence agent; 
 identify that a directory state of the home agent for a particular line comprises an unknown state; 
 send a snoop to the second coherence agent; 
 receive, from the second coherence agent, a response with implicit writeback in response to the snoop; and 
 set the directory state for the particular line to an invalid state based on the response with implicit writeback. 
   
     
     
         96 . The system of  claim 95 , wherein the home agent is to send a completion to the first coherence agent in response to the request. 
     
     
         97 . The system of  claim 96 , wherein the first coherence agent is to:
 send the request, wherein the request comprises a read invalidate request and a corresponding cache line of the coherence agent is an invalid copy; and   transition the particular cache line from invalid to an exclusive copy based on the completion.   
     
     
         98 . The system of  claim 95 , wherein the first node comprises a processor device. 
     
     
         99 . An apparatus comprising:
 a controller to interface between at least a first processor to recognize a first instruction set and second processor to recognize a second instruction set that is different from the first instruction set, the controller comprising interface logic to couple to a link comprising a plurality of lanes;   the interface logic to:
 identify that a directory state of a home agent for at least one line comprises an unknown state; 
 send a snoop to a coherence agent; 
 receive, from the coherence agent, a response with implicit writeback in response to the snoop; and 
 set the directory to an invalid state based on the response with implicit writeback. 
   
     
     
         100 . An apparatus comprising:
 an agent including protocol layer logic to:
 receive an explicit writeback request, wherein the explicit writeback request corresponds to a modified cache line corresponding to a particular line of memory, and the explicit writeback request includes a hint to indicate that another cache is to request the particular line of memory; 
 determine whether to push data of the modified cache line to the other cache prior to writing the data of the modified cache line to the particular line of memory; and 
 send a complete corresponding to the explicit writeback request. 
   
     
     
         101 . The apparatus of  claim 100 , wherein determining not to push the data is to cause the data of the modified cache line to be written to the particular line of memory. 
     
     
         102 . The apparatus of  claim 101 , wherein the data of the modified cache line is not to be pushed to the other cache. 
     
     
         103 . The apparatus of  claim 101 , wherein the protocol layer logic is further transition a directory state corresponding to the particular line of memory from an exclusive state to an invalid state. 
     
     
         104 . The apparatus of  claim 100 , wherein determining to push the data is to cause the data of the modified cache line to be sent to a first cache agent corresponding to the other cache to write the data of the modified cache line to be written to a corresponding cache line of the other cache. 
     
     
         105 . The apparatus of  claim 104 , wherein the protocol layer logic is further transition a directory state corresponding to the particular line of memory to a state indicating that the other cache has an exclusive copy of the particular line of memory. 
     
     
         106 . The apparatus of  claim 104 , wherein the explicit writeback request comprises a single coherence protocol request from a different, second cache agent corresponding to the modified cache line. 
     
     
         107 . The apparatus of  claim 100 , wherein determining to push the data comprises determining whether the other cache is a local cache. 
     
     
         108 . The apparatus of  claim 100 , wherein determining to push the data comprises determining whether there are other outstanding requests for the particular line of memory. 
     
     
         109 . An apparatus comprising:
 an agent including protocol layer logic to:
 send an explicit writeback request to a home agent, wherein the explicit writeback request corresponds to a modified cache line corresponding to a particular line of memory, the explicit writeback request includes a hint to indicate that another cache is to request the particular line of memory; and 
 receive a completion from the home agent for the explicit writeback request. 
   
     
     
         110 . The apparatus of  claim 109 , wherein the protocol layer logic is further to transition the modified cache line from a modified state to an invalid state following the sending of the explicit writeback request. 
     
     
         111 . The apparatus of  claim 109 , wherein the explicit writeback request is to cause data of the modified cache line to be written to the other cache without being written to the particular line of memory. 
     
     
         112 . The apparatus of  claim 111 , wherein the explicit writeback request comprises a single coherence protocol request. 
     
     
         113 . The apparatus of  claim 109 , wherein the explicit writeback request is to identify the other cache. 
     
     
         114 . An apparatus comprising:
 a memory controller to:
 receive a writeback flush message; 
 identify a set of pending writes of the memory controller to a particular persistent memory; and 
 write all of the set of pending writes to the particular memory based on the writeback flush message. 
   
     
     
         115 . The apparatus of  claim 114 , wherein the writeback flush message comprises a coherence protocol message. 
     
     
         116 . The apparatus of  claim 115 , wherein the writeback flush message generated by a cache agent. 
     
     
         117 . The apparatus of  claim 114 , wherein the set of pending writes comprises all pending writes of the memory controller. 
     
     
         118 . The apparatus of  claim 114 , wherein the writeback flush message is to identify the memory controller. 
     
     
         119 . The apparatus of  claim 118 , wherein the writeback flush message is to identify a memory address corresponding to the particular memory. 
     
     
         120 . The apparatus of  claim 114 , wherein the writeback flush message corresponds to a power failure management activity. 
     
     
         121 . An apparatus comprising:
 an agent including protocol layer logic to:
 identify that a particular line of a cache is in a forward state; 
 receive a request corresponding to the particular line of the cache; 
 determine whether to retain the forward state following a response to the request; and 
 respond to the request. 
   
     
     
         122 . The apparatus of  claim 121 , wherein determining whether to retain the forward state includes determining a value of a configuration parameter for the agent, wherein a value of the configuration parameter identifies whether or not the forward state is to be retained. 
     
     
         123 . The apparatus of  claim 122 , wherein the protocol layer logic is further to change the value of the configuration parameter. 
     
     
         124 . The apparatus of  claim 121 , wherein determining whether to retain the forward state comprises determining to retain the forward state following the response. 
     
     
         125 . The apparatus of  claim 121 , wherein determining whether to retain the forward state comprises determining to transition from the forward state following the response. 
     
     
         126 . The apparatus of  claim 125 , wherein the forward state is to transition from the forward state to a shared state. 
     
     
         127 . The apparatus of  claim 125 , wherein the forward state is to transition from the forward state to the invalid state. 
     
     
         128 . The apparatus of  claim 121 , wherein the request comprises a snoop. 
     
     
         129 . The apparatus of  claim 121 , wherein responding to the request comprises forwarding data from the particular line of cache to another agent. 
     
     
         130 . An apparatus comprising:
 an agent including:
 protocol layer logic to:
 generate a fanout snoop request; and 
 
 routing layer logic to:
 identify a plurality of agents to receive a snoop according to the fanout snoop request; and 
 send snoop requests to each of the plurality of agents. 
 
   
     
     
         131 . The apparatus of  claim 130 , wherein the routing layer logic is to identify the plurality of agents from a configuration parameter identifying each agent in a corresponding fanouot cone. 
     
     
         132 . The apparatus of  claim 131 , wherein the configuration parameter is to identify each agent by address. 
     
     
         133 . The apparatus of  claim 130 , wherein the protocol layer logic is further to determine whether a fanout snoop can be used to snoop one or more agents. 
     
     
         134 . The apparatus of  claim 130 , wherein the agent is a home agent. 
     
     
         135 . The apparatus of  claim 130 , wherein the snoop requests each comprise a snoop to obtain cache data in anyone of a forward or shared state. 
     
     
         136 . The apparatus of  claim 130 , wherein the snoop requests each comprise a snoop to obtain cache data in anyone of a modified, exclusive, forward, or shared state. 
     
     
         137 . The apparatus of  claim 130 , wherein the snoop requests each comprise a snoop to obtain cache data in anyone of a modified or exclusive state. 
     
     
         138 . The apparatus of  claim 130 , wherein the snoop requests each comprise a snoop to the cache of the respective agent, wherein data in modified state is to be flushed to memory. 
     
     
         139 . The apparatus of  claim 130 , wherein the protocol layer logic is further to receive snoop responses for one or more of the snoop requests.