Vertical semiconductor device and method of manufacturing the same

Abstract

A vertical semiconductor device includes a first active pillar vertically protruded from a semiconductor substrate; a first vertical gate connected to at least one side of the first active pillar and formed along a direction that crosses a buried bit line; and a first body line connected to at least one side of the first active pillar which is not connected to the first vertical gate.

1 - 7 . (canceled) 
     
     
         8 . A method of manufacturing a vertical semiconductor device, comprising:
 forming silicon line patterns by etching a semiconductor substrate, forming a buried bit line in a lower portion of a first trench between the silicon line patterns;   forming an insulating layer over the buried bit line within the first trench;   forming a second trench defining a vertical gate region by etching the silicon line pattern and the insulating layer;   forming a conduction layer within the second trench;   device-isolating the conduction layer to form vertical gates;   forming a third trench defining a body line region by etching the silicon line pattern between the second trench and the insulating layer; and   filling a conduction layer over the third trench to form a body line.   
     
     
         9 . The method of  claim 8 , the method further comprising, before the forming of the buried bit line, forming a bit line contact one sidewall of the silicon line pattern. 
     
     
         10 . The method of  claim 8 , wherein the second trench separates the silicon line patterns by a predetermined distance and is formed to expose three sides of both end portions of the separated silicon line pattern. 
     
     
         11 . The method of  claim 10 , wherein the forming of a vertical gate includes patterning the conduction layer along a direction crossing the buried bit line so that the patterned conduction layer surrounds three sides the silicon line pattern. 
     
     
         12 . The method of  claim 8 , further comprising forming an interlayer insulating layer over the first conduction layer in the second trench. 
     
     
         13 . The method of  claim 8 , wherein the third trench is formed so that the insulating layer remains between the body line region and the vertical gate region. 
     
     
         14 . The method of  claim 8 , wherein the silicon line pattern is separated by the third trench to form active pillars. 
     
     
         15 . A method of manufacturing a vertical semiconductor device comprising:
 forming a silicon bar pattern;   forming a vertical gate wholly or partly surrounding sidewalls of the silicon bar pattern;   forming a body line trench passing through the silicon bar pattern so as to divide the silicon bar pattern into a first pillar pattern and a second pillar pattern and divide the vertical gate pattern into first and second vertical gates; and   forming a body line using conductive material in the body line trench.   
     
     
         16 . The method of  claim 15 , wherein forming silicon bar patterns includes:
 forming silicon line patterns by etching a semiconductor substrate;   forming a buried bit line at a lower portion of a first trench between the line type silicon line patterns;   forming an insulating layer over the buried bit line in the first trench; and   etching the silicon line patterns and the insulating layer using a vertical gate mask defining a vertical gate region to form a second trench and a third trench.