High bandwidth memory interface

Abstract

A memory module that includes a buffer and a plurality of synchronous memory devices. The memory module also includes bidirectional bus lines, and each of the synchronous memory devices has bidirectional data terminals. The buffer is configured to regenerate signals received on the bus lines for receipt by the synchronous memory devices, and to regenerate signals received from any one of the synchronous memory devices for receipt by the bus lines. The memory module may further include command lines and a clock line for providing commands and a clock signal to the synchronous memory devices via a command buffer. The combined data bus width of the memory module may be greater than the data bus width of any single one of synchronous memory device, and the total address space provided by the memory module may be larger than the data space for any single synchronous memory device.

What is claimed is: 
     
         1 . A memory module comprising:
 a printed circuit board having a plurality of connectors on one edge;   one or more memory devices mounted on the printed circuit board, each of the one or more memory devices having connections to the plurality of connectors; and   a plurality of film resistors each connected to the connections.   
     
     
         2 . The memory module as claimed in  claim 1  wherein at least one of the film resistors is a termination resistor located on the corresponding connection. 
     
     
         3 . The memory module as claimed in  claim 2  wherein the termination resistor comprises a series stub termination resistor. 
     
     
         4 . The memory module as claimed in  claim 3  wherein series stub termination resistor is approximately 20 ohms. 
     
     
         5 . The memory module as claimed in  claim 1  wherein the film resistors are located on a package substrate of the one or more memory devices. 
     
     
         6 . The memory module as claimed in  claim 5  wherein the film resistors are located near solder balls of the package substrate. 
     
     
         7 . The memory module as claimed in  claim 5  wherein the film resistors are located on a surface of the package substrate. 
     
     
         8 . The memory module as claimed in  claim 1  wherein the film resistors are formed by depositing a resistive material on selected areas. 
     
     
         9 . The memory module as claimed in  claim 1  wherein the film resistors are formed by depositing a resistive material over an area and then etching away unwanted resistive material. 
     
     
         10 . The memory module as claimed in  claim 1  wherein the film resistors are formed by a photolithographic process.