Semiconductor device

Abstract

This technology provides a semiconductor device capable of controlling an equivalent series resistance (ESR) generated from decoupling capacitors. To this end, the semiconductor device may include a plurality of decoupling capacitors electrically coupled between a first wire and a second wire in parallel, and a plurality of switches coupled between common source/drain terminals of two adjacent decoupling capacitors of the plurality of decoupling capacitors and the second wire.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a plurality of decoupling capacitors electrically coupled between a first wire and a second wire in parallel; and   a plurality of switches coupled between common source/drain terminals of two adjacent decoupling capacitors of the plurality of decoupling capacitors and the second wire.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising a switch control unit suitable for controlling the plurality of switches. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the switch control unit selectively turns on or off the plurality of switches in response to a plurality of control signals. 
     
     
         4 . The semiconductor device of  claim 2 , wherein the plurality of decoupling capacitors are grouped into a plurality of groups. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the switch control unit turns on or off the plurality of switches in response to a plurality of control signals applied to the respective groups. 
     
     
         6 . The semiconductor device of  claim 2 , wherein the switch control unit comprises a mode register set (MRS) 
     
     
         7 . The semiconductor device of  claim 1 , wherein each of the plurality of switches comprises at least one transistor. 
     
     
         8 . The semiconductor device of  claim 1 , wherein
 the first wire is a power source voltage line, and   the second wire is a ground voltage line.   
     
     
         9 . The semiconductor device of  claim 1 , wherein, when N switches are turned off, gates of (N+1) decoupling capacitors having common source/drain terminals coupled to the turned-off switches are coupled, N being a positive integer. 
     
     
         10 . The semiconductor device of  claim 1 , wherein, as the number of the switches that are turned on increases, capacitance of the decoupling capacitors is increased and resistance of the decoupling capacitors is decreased. 
     
     
         11 . The semiconductor device of  claim 1 , wherein, as the number of the switches that are turned off increases, capacitance of the decoupling capacitors is decreased and resistance of the decoupling capacitors is increased. 
     
     
         12 . A semiconductor device comprising:
 a decoupling capacitor unit electrically coupled between a first wire and a second wire; and   a control unit suitable for controlling an equivalent series resistance (ESR) component of the decoupling capacitor unit by electrically coupling or decoupling the decoupling capacitor unit to or from the second wire.   
     
     
         13 . The semiconductor device of  claim 12 , wherein the control unit comprises:
 a switch control unit suitable for generating a plurality of control signals; and   a switching unit electrically coupling or decoupling the decoupling capacitor unit to or from the second wire in response to the control signals.   
     
     
         14 . The semiconductor device of  claim 13 , wherein the decoupling capacitor unit includes a plurality of decoupling capacitors coupled between the first wire and the second wire in parallel, and the switching unit includes a plurality of switches, each switch coupled between a common terminal of two adjacent decoupling capacitors and the second wire. 
     
     
         15 . The semiconductor device of  claim 14 , wherein each of the decoupling capacitors includes metal-oxide semiconductor (MOS) capacitor having a gate coupled to the first wire and a source and drain coupled to the second wire. 
     
     
         16 . The semiconductor device of  claim 14 , wherein each of the switches comprises at least one transistor having a gate receiving the respective control signal and a source and drain coupled between the common terminal and the second wire. 
     
     
         17 . The semiconductor device of  claim 14 , wherein the decoupling capacitors and the switches are grouped into a plurality of groups, each group including (N+1) decoupling capacitors and N switches, N being a positive integer. 
     
     
         18 . The semiconductor device of  claim 17 , wherein the switch control unit outputs the control signals to the respective groups. 
     
     
         19 . The semiconductor device of  claim 13 , wherein the switch control unit comprises a mode register set (MRS).