Fabrication method of semiconductor structure

Abstract

A fabrication method of a semiconductor structure includes providing a chip having at least an electrode pad, forming a titanium layer on the electrode pad, forming a dielectric layer on the chip and a portion of the titanium layer, forming a copper layer on the dielectric layer and the titanium layer, forming a conductive pillar on the copper layer corresponding in position to the titanium layer, and removing a portion of the copper layer that is not covered by the conductive pillar. When the portion of the copper layer is removed by etching, undercutting of the titanium layer is avoided since the titanium layer is covered by the dielectric layer, thereby providing an improved support for the conductive pillar to increase product reliability.

1 - 13 . (canceled) 
     
     
         14 . A fabrication method of a semiconductor structure, comprising the steps of:
 providing a chip having at least an electrode pad;   forming a first metal layer on the electrode pad;   forming a dielectric layer on the chip and the first metal layer, the dielectric layer having an opening for exposing a portion of the first metal layer;   forming a second metal layer on the dielectric layer and the exposed portion of the first metal layer, the first metal layer being different in material from the second metal layer;   forming a conductive pillar on the second metal layer corresponding in position to the first metal layer; and   removing a portion of the second metal layer that is not covered by the conductive pillar and preserving the remaining portion of the second metal layer covered by the conductive pillar.   
     
     
         15 . The method of  claim 14 , wherein the first metal layer is a titanium layer or a titanium tungsten layer. 
     
     
         16 . The method of  claim 14 , wherein forming the first metal layer comprises:
 forming a first metal material on the electrode pad and a surface of the chip;   forming a resist layer to cover a portion of the first metal material located on the electrode pad and the surface of the chip around the electrode pad;   removing the remaining portion of the first metal material that is not covered by the resist layer; and   removing the resist layer.   
     
     
         17 . The method of  claim 14 , wherein the second metal layer is a copper layer. 
     
     
         18 . The method of  claim 14 , wherein the conductive pillar is a copper pillar. 
     
     
         19 . The method of  claim 14 , further comprising, before removing the portion of the second metal layer that is not covered by the conductive pillar, forming a conductive material on a top surface of the conductive pillar. 
     
     
         20 . A fabrication method of a semiconductor structure, comprising:
 providing a chip having at least an electrode pad;   forming a first metal layer on the electrode pad;   forming a second metal layer on the first metal layer, the first metal layer being different in material from the second metal layer;   forming a conductive pillar on the second metal layer corresponding in position to the first metal layer, the first metal layer having an area larger than a sectional area of the conductive pillar; and   removing a portion of the second metal layer that is not covered by the conductive pillar and preserving the remaining portion of the second metal layer covered by the conductive pillar.   
     
     
         21 . The method of  claim 20 , wherein the first metal layer is a titanium layer or a titanium tungsten layer. 
     
     
         22 . The method of  claim 20 , further comprising, before forming the first metal layer on the electrode pad, forming a dielectric layer on the chip and the electrode pad, the dielectric layer having an opening for exposing the electrode pad. 
     
     
         23 . The method of  claim 22 , wherein the first metal layer is further formed on a surface of the dielectric layer around the electrode pad. 
     
     
         24 . The method of  claim 22 , wherein forming the first metal layer comprises:
 forming a first metal material on the electrode pad and the dielectric layer;   forming a resist layer to cover a portion of the first metal material located on the electrode pad and a surface of the chip around the electrode pad;   removing the remaining portion of the first metal material that is not covered by the resist layer; and   removing the resist layer.   
     
     
         25 . The method of  claim 22 , wherein the second metal layer is further formed on the dielectric layer. 
     
     
         26 . The method of  claim 20 , wherein the second metal layer is a copper layer. 
     
     
         27 . The method of  claim 20 , wherein the conductive pillar is a copper pillar. 
     
     
         28 . The method of  claim 20 , further comprising, before removing the portion of the second metal layer that is not covered by the conductive pillar, forming a conductive material on a top surface of the conductive pillar.