Soft start switching power supply system

Abstract

A switching power supply system includes a switching converter, to convert an input voltage into an output voltage and to generate a switching signal; a feedback circuit, to generate a feedback signal; an error amplifier to generate an error signal; a triangle signal generator to generate a triangle signal; a constant on time control circuit to receive error signal and the triangle signal, and to generate a constant on time control signal to control power switch; in the system. The triangle signal has a DC bias based on either a soft start signal or a second reference signal. The system could perform soft start function and meanwhile keep matching between the error signal and the triangle signal.

I/We claim: 
     
         1 . A switching power supply system, comprising:
 a switching converter, comprising at least one power switch, wherein by turning the at least power switch on and off, the switching converter converts an input voltage into an output voltage, and wherein a switching signal is generated by the switching converter;   a feedback circuit, receiving the output voltage, operable to generate a feedback signal;   an error amplifier, configured to generate an error signal according to the feedback signal and to either a soft start signal or a first reference signal;   a triangle signal generator, configured to generate a triangle signal according to the soft start signal, the switching signal, the output voltage and a second reference signal;   a constant on time control circuit, coupled to the error amplifier and the triangle signal generator, the constant on time control circuit configured to receive the error signal and the triangle signal, and operable to generate a constant on time control signal to control the at least one power switch; and   wherein the triangle signal comprises a DC bias, and wherein the DC bias is based on either the soft start signal or the second reference signal.   
     
     
         2 . The switching power supply system according to  claim 1 , wherein the system further comprises a soft start signal generator, the soft start signal generator configured to generate the soft start signal when the system is starting, and wherein the constant on time control circuit comprises:
 a PWM comparator, having a non-inverting input terminal, an inverting input terminal and an output terminal, wherein the non-inverting input terminal receives the error signal, and wherein the inverting input terminal receives the triangle signal; and   a timer, coupled to the output terminal of the PWM comparator, the timer configured to generate the constant on time control signal according to an output of the PWM comparator.   
     
     
         3 . The switching power supply system according to  claim 1 , wherein the triangle signal generator comprises:
 a first resistor, wherein a first terminal of the first resistor receives the switching signal;   a second resistor, wherein a second terminal of the first resistor is coupled to a first terminal of the second resistor;   a first capacitor, wherein a first terminal of the first capacitor receives the output voltage, and wherein a second terminal of the first capacitor is coupled to the second terminal of the first resistor; and   a voltage follower, having two non-inverting input terminals, an inverting input terminal and an output terminal, wherein the two non-inverting input terminals respectively receive the soft start signal and the second reference signal, and wherein the inverting input terminal is coupled to the output terminal of the voltage follower, and further wherein the output terminal of the voltage follower is coupled to a second terminal of the second resistor, and is configured to provide the triangle signal.   
     
     
         4 . The switching power supply system according to  claim 1 , wherein the second reference signal is equal to the first reference signal. 
     
     
         5 . The switching power supply system according to  claim 1 , further comprising:
 a sleep-mode detecting circuit, configured to generate a sleep-mode detecting signal to indicate whether the system enters into sleep mode; and   a clamping circuit, coupled to the sleep-mode detecting circuit, the triangle signal generator and the error amplifier, the clamping circuit configured to clamp the error signal according to the triangle signal and the error signal when the system is in sleep mode.   
     
     
         6 . The switching power supply system according to  claim 5 ,
 wherein the clamping circuit clamps the error signal if (1) the sleep-mode detecting signal indicating that the system enters into sleep mode, and (2) the voltage level difference between the error signal and the triangle signal is larger than a first offset voltage; and   wherein the sleep-mode detecting signal indicates that the system enters into sleep mode if (1) all of the at least one power switch in the system is off, and (2) the voltage level difference between the error signal and the triangle signal is larger than a second offset voltage for a first delay time period; and   wherein the sleep-mode detecting signal indicates that the system exits the sleep mode if (1) any of the at least one power switch in the system is on, or (2) the feedback signal is smaller than a third reference signal.   
     
     
         7 . The switching power supply system according to  claim 6 , wherein the first offset voltage is larger than the second offset voltage. 
     
     
         8 . The switching power supply system according to  claim 6 , wherein the third reference signal is equal to 0.95 times of the first reference signal. 
     
     
         9 . The switching power supply system according to  claim 5 , wherein the clamping circuit comprises:
 a first offset voltage source, wherein a positive terminal of the first offset voltage source is coupled to the output terminal of the triangle signal generator to receive the triangle signal;   an operational amplifier, wherein the operational amplifier is coupled to a negative terminal of the first offset voltage with a non-inverting input terminal, and wherein an inverting input terminal of the operational amplifier receives the error signal;   a first switch, wherein the first switch is turned on and off according to the sleep-mode detecting signal;   a current source, wherein a positive terminal of the current source receives a system power supply voltage via the first switch; and   a MOSFET, wherein a gate electrode of the MOSFET is coupled to an output terminal of the operational amplifier, and wherein a drain electrode of the MOSFET is coupled to a negative terminal of the current source, and further wherein a source electrode of the MOSFET is coupled to the error amplifier.   
     
     
         10 . The switching power supply system according to  claim 5 , wherein the system further comprises a logic circuit, receiving the constant on-time control signal, operable to generate at least one control signal for controlling the at least one power switch, and wherein the sleep-mode detecting circuit comprises:
 a second offset voltage source, wherein a negative terminal of the second offset voltage source is coupled to the output terminal of the error amplifier configured to receive the error signal;   a first comparator, having a non-inverting input terminal, an inverting input terminal, an enable terminal and an output terminal, wherein the non-inverting input terminal is coupled to the output terminal of the triangle signal generator configured to receive the triangle signal, and wherein the inverting input terminal of the first comparator is coupled to a positive terminal of the second offset voltage source;   a NOR gate, having at least one input terminal and an output terminal, wherein the at least one input terminal is configured to receive the at least one control signal, and wherein the output terminal of the NOR gate is coupled to the enable terminal of the first comparator, and is configured to provide a standby signal;   a delay circuit, coupled to the output terminal of the first comparator with an input terminal, the delay circuit configured to delay an output from first comparator for a first delay time period; and   a flip-flop, having a set terminal, a reset terminal and an output terminal, wherein the set terminal of the flip-flop is coupled to an output terminal of the delay circuit, and wherein the reset terminal of the flip-flop receives a control signal which controls a primary switch of the switching power supply system, and further wherein the output terminal of the flip-flop provides the sleep-mode detecting signal.   
     
     
         11 . The switching power supply system according to  claim 5 , wherein the system further comprises a logic circuit, receiving the constant on-time control signal, operable to generate at least one control signal for controlling the at least one power switch, and wherein the sleep-mode detecting circuit comprises:
 a second offset voltage, wherein a negative terminal of the second offset voltage source is coupled to the output terminal of the error amplifier configured to receive the error signal;   a first comparator, having a non-inverting input terminal, an inverting input terminal, an enable terminal and an output terminal, wherein the non-inverting input terminal is coupled to the output terminal of the triangle signal generator configured to receive the triangle signal, and wherein the inverting input terminal of the first comparator is coupled to a positive terminal of the second offset voltage source;   a NOR gate, having at least one input terminal and an output terminal, wherein the at least one input terminal is configured to receive the at least one control signal, and wherein the output terminal of the NOR gate is coupled to the enable terminal of the first comparator configured to provide a standby signal;   a delay circuit, coupled to the output terminal of the first comparator with an input terminal, the delay circuit configured to delay an output from first comparator for a first delay time;   a second comparator, receiving a third reference signal with a non-inverting input terminal, and receiving the feedback signal with an inverting input terminal;   an OR gate, having two input terminals and an output terminal, wherein the two input terminals respectively receive an output from the second comparator, and a control signal that controls a primary switch of the switching power supply system; and   a flip-flop, having a set terminal, a reset terminal and an output terminal, wherein the set terminal of the flip-flop is coupled to an output terminal of the delay circuit, and wherein the reset terminal of the flip-flop is coupled to the output terminal of the OR gate, and further wherein the output terminal of the flip-flop provides the sleep-mode detecting signal.   
     
     
         12 . The switching power supply system according to  claim 5 , wherein the system further comprises a logic circuit configured to receive the constant on-time control signal, operable to generate at least one control signal for controlling the at least one power switch, and wherein the sleep-mode detecting circuit comprises:
 a second offset voltage, wherein a negative terminal of the second offset voltage source is coupled to the output terminal of the error amplifier configured to receive the error signal;   a first comparator, having a non-inverting input terminal, an inverting input terminal, an enable terminal and an output terminal, wherein the non-inverting input terminal is coupled to the output terminal of the triangle signal generator configured to receive the triangle signal, and wherein the inverting input terminal of the first comparator is coupled to a positive terminal of the second offset voltage source;   a NOR gate, having at least one input terminal and an output terminal, wherein the at least one input terminal is configured to receive the at least one control signal, and wherein the output terminal of the NOR gate is coupled to the enable terminal of the first comparator configured to provide a standby signal;   a delay circuit, coupled to the output terminal of the first comparator with an input terminal, the delay circuit configured to delay an output from the first comparator for a first delay time period;   a second comparator, receiving a third reference signal with a non-inverting input terminal, and configured to receive the feedback signal with an inverting input terminal;   an OR gate, having two input terminals and an output terminal, wherein the two input terminals respectively receive an output from the second comparator, and a control signal that controls a primary switch of the switching power supply system;   a flip-flop, having a set terminal, a reset terminal and an output terminal, wherein the set terminal of the flip-flop is coupled to an output terminal of the delay circuit, and wherein the reset terminal of the flip-flop is coupled to the output terminal of the OR gate; and   an AND gate, having two input terminals and an output terminal, wherein the two input terminals are respectively coupled to the output terminal of the flip-flop and the output terminal of the first comparator, and wherein the output terminal of the AND gate provides the sleep-mode detecting signal.   
     
     
         13 . The switching power supply system according to  claim 5 , wherein the system further comprises a logic circuit configured to receive the constant on-time control signal, operable to generate at least on control signal for controlling the at least one power switch, and wherein the sleep-mode detecting circuit comprises:
 a second offset voltage, wherein a negative terminal of the second offset voltage source is coupled to the output terminal of the error amplifier configured to receive the error signal;   a first comparator, having a non-inverting input terminal, an inverting input terminal, an enable terminal and an output terminal, wherein the non-inverting input terminal is coupled to the output terminal of the triangle signal generator configured to receive the triangle signal, and wherein the inverting input terminal of the first comparator is coupled to a positive terminal of the second offset voltage source;   a NOR gate, having at least one input terminal and an output terminal, wherein the at least one input terminal is configured to receive the at least one control signal, and wherein the output terminal of the NOR gate is coupled to the enable terminal of the first comparator configured to provide a standby signal;   a delay circuit, coupled to the output terminal of the first comparator with an input terminal, the delay circuit configured to delay an output from first comparator for a first delay time period;   a second comparator, receiving a third reference signal with a non-inverting input terminal, and receiving the feedback signal with an inverting input terminal;   an OR gate, having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receive an output from the second comparator;   a flip-flop, having a set terminal, a reset terminal and an output terminal, wherein the set terminal of the flip-flop is coupled to an output terminal of the delay circuit, and wherein the reset terminal of the flip-flop is coupled to the output terminal of the OR gate; and   an AND gate, having two input terminals and an output terminal, wherein the two input terminals are respectively coupled to the output terminal of the flip-flop and the output terminal of the first comparator, and wherein the output terminal of the AND gate provides the sleep-mode detecting signal; and   an inverter, having an input terminal and an output terminal, wherein the input terminal of the inverter is coupled to the output terminal of the AND gate, and wherein the output terminal of the inverter is coupled to the second input terminal of the OR gate.   
     
     
         14 . A switching power supply controller, configured to control at least one power switch in a switching converter to generate a switching signal and to convert an input voltage to an output voltage, the switching power supply controller comprising:
 a feedback circuit, receiving the output voltage, operable to generate a feedback signal based on the output voltage;   an error amplifier, coupled to the feedback signal, the error amplifier is configured to generate an error signal according to the feedback signal and to either a soft start signal or a first reference signal;   a triangle signal generator, coupled to the switching converter, the triangle signal generator configured to generate a triangle signal according to the soft start signal, the switching signal, the output voltage and a second reference signal;   a constant on time control circuit, coupled to the error amplifier and the triangle signal generator, the constant on time control circuit configured to receive error signal and the triangle signal, and operable to generate a constant on time control signal to control the at least one power switch; and   wherein the triangle signal comprises a DC bias, and wherein the DC bias is based on either the soft start signal or the second reference signal.   
     
     
         15 . The switching power supply controller according to  claim 14 , further comprising:
 a sleep-mode detecting circuit, configured to generate a sleep-mode detecting signal to indicate whether the system enters into sleep mode; and   a clamping circuit, coupled to the sleep-mode detecting circuit, the triangle signal generator and the error amplifier, the clamping circuit configured to clamp the error signal according to the triangle signal and the error signal when the system enters into sleep mode.   
     
     
         16 . A control method for controlling switching power supply system, comprising:
 generating a feedback signal according to an output voltage of the switching power supply system;   generating an error signal according to the feedback signal and to either a first reference signal or a soft start signal;   generating a triangle signal according to the soft start signal, a second reference signal, a switching signal and the output voltage; and   generating a constant on time control signal according to the triangle and the error signal, the constant on time control signal controlling power switch in the switching power supply system;   wherein the triangle signal comprises a DC bias and wherein the DC bias is based on either the soft start signal or the second reference signal.   
     
     
         17 . The method for controlling switching power supply system according to  claim 16 , wherein the second reference signal is equal to the first reference signal. 
     
     
         18 . The method for controlling switching power supply system according to  claim 16 , further comprising:
 generating a sleep-mode detecting signal; and   clamping the error signal according to the sleep-mode detecting signal, the error signal and the triangle signal.   
     
     
         19 . The method for controlling switching power supply system according to  claim 16 , wherein the error signal is clamped if
 (1) the sleep-mode detecting signal indicating that the switching power supply system enters into sleep mode; and   (2) the voltage level difference between the error signal and the triangle signal being no less than a first offset voltage.   
     
     
         20 . The method for controlling switching power supply system according to  claim 18 , wherein the sleep-mode detecting signal indicates the switching power supply system enters into sleep mode if
 (1) all of the at least one power switch in the switching power supply system is off; and   (2) the voltage level difference between the error signal and the triangle signal being no less than a second offset voltage for a first delay time period.   
     
     
         21 . The method for controlling switching power supply system according to  claim 18 , wherein the sleep-mode detecting signal indicates the switching power supply system exits sleep mode if
 (1) any of the at least one power switch in the power supply system is on; or   (2) the feedback signal being smaller than a third reference signal.