Transistor with bonded gate dielectric

Abstract

A method for forming a semiconductor device includes forming a dielectric layer on a first substrate and wafer bonding the dielectric layer of the first substrate to a second substrate including SiC with a passivating layer formed on the SiC. A portion of the first substrate is removed from a side opposite the dielectric layer. The dielectric layer is patterned to form a gate dielectric for a field effect transistor formed on the second substrate.

1 . A semiconductor device, comprising:
 a SiC substrate;   a passivation layer of silicon oxide directly on the SiC substrate having a thickness of 2 nm to 10 nm;   a thermally grown dielectric formed directly on a silicon layer and wafer bonded to the SiC such that the thermally grown dielectric forms a gate dielectric, the thermally grown dielectric is composed of silicon oxide and has a thickness ranging from 50 nm to 500 nm, wherein the thermally grown dielectric that provides the gate dielectric is directly coupled to the passivation layer by a bonded interface;   a gate conductor provided directly on the gate dielectric; and   source and drain regions formed in the SiC substrate adjacent to the gate dielectric.   
     
     
         2 . The device as recited in  claim 1 , wherein the gate conductor includes the silicon layer. 
     
     
         3 . (canceled) 
     
     
         4 . (canceled) 
     
     
         5 . (canceled) 
     
     
         6 . (canceled) 
     
     
         7 . (canceled) 
     
     
         8 . The semiconductor device of  claim 1 , wherein the passivation layer has ends that are aligned with edges of the gate conductor. 
     
     
         9 . The semiconductor device of claim , wherein the passivation layer extends across an upper surface of the source and drain regions. 
     
     
         10 . (canceled) 
     
     
         11 . The semiconductor device of  claim 1 , wherein the gate conductor is comprised of silicon, silicon germanium or a combination thereof. 
     
     
         12 . The semiconductor device of  claim 1 , wherein the gate conductor is comprised of copper, tungsten, titanium, aluminum, doped polysilicon, organic conductors or a combination thereof.