Method for fabricating trench type transistor
Abstract
An epitaxial layer is formed on the semiconductor substrate. A nitride doping region is then formed at a surface of the epitaxial layer. A hard mask layer is formed on the epitaxial layer. The hard mask layer comprises at least an opening. Through the opening, agate trench is etched into the epitaxial layer. A gate is formed within the gate trench. The hard mask layer is removed such that the gate protrudes from the surface of the epitaxial layer. An ion well is formed within the epitaxial layer. A source doping region is formed within the ion well. An upper portion of the gate that protrudes from the surface of the epitaxial layer is selectively oxidized to thereby form an oxide capping layer. Using the oxide capping layer as an etching hard mask, the epitaxial layer is self-aligned etched to thereby form a contact hole.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for fabricating a trench type transistor device, comprising:
providing a semiconductor substrate; forming an epitaxial layer on the semiconductor substrate; forming a nitride doping region at a surface of the epitaxial layer; forming a hard mask layer on the epitaxial layer, the hard mask layer comprising at least an opening; through the opening, etching a gate trench into the epitaxial layer; forming a gate oxide layer in the gate trench; forming a gate within the gate trench; removing the hard mask layer such that the gate protrudes from the surface of the epitaxial layer; forming an ion well within the epitaxial layer; forming a source doping region within the ion well; selectively oxidizing an upper portion of the gate that protrudes from the surface of the epitaxial layer to thereby form an oxide capping layer; and using the oxide capping layer as an etching hard mask, self-aligned etching the epitaxial layer to thereby form a contact hole.
2 . The method for fabricating a trench type transistor device according to claim 1 wherein the semiconductor substrate is an N type heavily doped silicon substrate and acts as a drain of the trench type transistor device.
3 . The method for fabricating a trench type transistor device according to claim 2 wherein the epitaxial layer is an N type epitaxial silicon layer.
4 . The method for fabricating a trench type transistor device according to claim 1 wherein the hard mask comprises silicon oxide or silicon nitride.
5 . The method for fabricating a trench type transistor device according to claim 3 wherein the ion well is a P well.
6 . The method for fabricating a trench type transistor device according to claim 5 wherein the source doping region is an N type source doping region.Join the waitlist — get patent alerts
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