Unit pixel of image sensor and image sensor having the same

Abstract

A unit pixel is provided. The unit pixel includes photoelectric converters stacked on each other and configured to generate photo-charges in response to light signals within respective wavelength ranges and provide the photo-charges to respective storage nodes; memories configured to concurrently receive and store the photo-charges from the respective storage nodes in response to a common control signal; and a signal generator that generates analog signals based on the photo-charges stored in the memories, respectively.

What is claimed is: 
     
         1 . A unit pixel of an image sensor, the unit pixel comprising:
 first through n-th photoelectric converters stacked on each other, and configured to generate photo-charges in response to light signals within respective wavelength ranges and provide the photo-charges to first through n-th storage nodes, respectively, n being an integer equal to or greater than two;   first through n-th memories configured to concurrently receive and store the photo-charges from the first through n-th storage nodes, respectively, in response to a common control signal; and   a signal generator configured to generate first through n-th analog signals consecutively based on the photo-charges stored in the first through n-th memories, respectively.   
     
     
         2 . The unit pixel of  claim 1 , wherein the first through n-th memories and the signal generator are formed on a substrate and the first through n-th photoelectric converters are formed above the substrate. 
     
     
         3 . The unit pixel of  claim 2 , wherein each of the first through n-th photoelectric converters comprises an organic photodiode having an organic material. 
     
     
         4 . The unit pixel of  claim 1 , wherein n is equal to three or more,
 the first photoelectric converter is configured to generate the photo-charges in response to a light signal within a wavelength range of blue color and provide the photo-charges to the first storage node,   the second photoelectric converter is configured to generate the photo-charges in response to a light signal within the wavelength range of green color and provide the photo-charges to the second storage node, and   the third photoelectric converter is configured to generate the photo-charges in response to a light signal within a wavelength range of red color and provide the photo-charges to the third storage node.   
     
     
         5 . The unit pixel of  claim 4 , wherein n is equal to four or more, and the fourth photoelectric converter is configured to generate the photo-charges in response to a light signal within a wavelength range of infrared rays and provide the photo-charges to the fourth storage node. 
     
     
         6 . The unit pixel of  claim 1 , wherein a k-th memory includes a k-th storage transistor comprising a source coupled to a k-th storage node, a drain corresponding to a k-th memory node and a gate configured to receive the common control signal, where k is a positive integer equal to or smaller than n. 
     
     
         7 . The unit pixel of  claim 6 , wherein k is equal to n, and the first through n-th storage transistors included in the first through n-th memories, respectively, are configured to turn on at a same time in response to the common control signal to concurrently transfer the photo-charges stored in the first through n-th storage nodes to first through n-th memory nodes, respectively. 
     
     
         8 . The unit pixel of  claim 1 , wherein the signal generator comprises:
 first through n-th transmission transistors configured to transfer the photo-charges stored in the first through n-th memories, respectively, to a floating diffusion area in response to first through n-th transmission control signals, respectively;   a reset transistor comprising a source coupled to the floating diffusion area, a drain coupled to a supply voltage and a gate configured to receive a reset control signal;   a driving transistor comprising a source, a drain coupled to the supply voltage and a gate coupled to the floating diffusion area; and   a row selection transistor comprising a drain coupled to the source of the driving transistor, a gate configured to receive a row selection signal and a source configured to output the first through n-th analog signals.   
     
     
         9 . The unit pixel of  claim 8 , wherein a k-th transmission transistor comprises a source coupled to a k-th memory, a drain coupled to the floating diffusion area and a gate configured to receive a k-th transmission control signal, where k is a positive integer equal to or smaller than n. 
     
     
         10 . The unit pixel of  claim 8 , wherein k is equal to n, and the first through n-th transmission control signals are activated consecutively. 
     
     
         11 . The unit pixel of an image sensor of  claim 10 , wherein the reset control signal and each of the first through n-th transmission control signals are activated alternately. 
     
     
         12 . An image sensor comprising:
 a pixel array comprising a plurality of unit pixels arranged in rows and columns, wherein each of the plurality of unit pixels is configured to generate first through n-th analog signals consecutively by detecting light signals within different wavelength ranges from a same start time to a same end time;   an analog-digital converter configured to convert the first through n-th analog signals to first through n-th digital signals, respectively; and   a controller configured to control operations of the pixel array and the analog-digital converter.   
     
     
         13 . The image sensor of  claim 12 , wherein each of the plurality of unit pixels comprises:
 first through n-th photoelectric converters stacked on each other, wherein each of the first through n-th photoelectric converters is configured to generate photo-charges in response to a light signal within a wavelength range and provide the photo-charges to first through n-th storage nodes, respectively, n being an integer equal to or greater than two;   first through n-th memories configured to concurrently receive and store the photo-charges from the first through n-th storage nodes, respectively, in response to a common control signal; and   a signal generator configured to generate the first through n-th analog signals consecutively based on the photo-charges stored in the first through n-th memories, respectively.   
     
     
         14 . The image sensor of  claim 13 , wherein the signal generator comprises:
 first through n-th transmission transistors configured to transfer the photo-charges stored in the first through n-th memory nodes, respectively, to a floating diffusion area in response to first through n-th transmission control signals, respectively;   a reset transistor comprising a source coupled to the floating diffusion area, a drain coupled to a supply voltage and a gate configured to receive a reset control signal;   a driving transistor comprising a source, a drain coupled to the supply voltage and a gate coupled to the floating diffusion area; and   a row selection transistor comprising a drain coupled to the source of the driving transistor, a gate configured to receive a row selection signal and a source configured to output the first through n-th analog signals.   
     
     
         15 . The image sensor of  claim 14 , wherein the controller is configured to activate the common control signal, the first through n-th transmission control signals and the reset control signal in a reset phase, deactivate the common control signal in a detection phase, activate the common control signal and deactivates the first through n-th transmission control signals in a memory storage phase, and activate each of the first through n-th transmission control signals and the reset control signal alternately in a read phase. 
     
     
         16 . A unit pixel comprising:
 a plurality of photoelectric converters configured to generate photo-charges in response to light signals of different wavelengths and provide the generated photo-charges to a plurality of storage nodes, respectively;   a plurality of memories configured to concurrently receive and store the photo-charges from the plurality of storage nodes, respectively, in response to a common control signal; and   a signal generator configured to generate a plurality of analog signals based on the photo-charges stored in the plurality of memories, respectively.   
     
     
         17 . The unit pixel of  claim 16 , wherein the different wavelengths comprise a wavelength of a blue color, a wavelength of a green color, and a wavelength of a red color. 
     
     
         18 . The unit pixel of  claim 17 , wherein the different wavelengths further comprises an infrared wavelength. 
     
     
         19 . The unit pixel of  claim 16 , further comprising a substrate,
 wherein the signal generator comprises:
 a plurality of transmission transistors configured to transfer the photo-charges stored in the plurality of memories, respectively, to a floating diffusion area in response to a plurality of transmission control signals, respectively; 
 a reset transistor comprising a source coupled to the floating diffusion area, a drain coupled to a supply voltage and a gate receiving a reset control signal; 
 a driving transistor comprising a source, a drain coupled to the supply voltage and a gate coupled to the floating diffusion area; and 
 a row selection transistor comprising a drain coupled to the source of the driving transistor, a gate configured to receive a row selection signal and a source configured to output the plurality of analog signals, 
   wherein the floating diffusion area, the plurality of storage nodes and the plurality of memories are formed on a surface of the substrate.   
     
     
         20 . The unit pixel of  claim 16 , further comprising a substrate,
 wherein the signal generator comprises:
 a plurality of transmission transistors configured to transfer the photo-charges stored in the plurality of memories, respectively, to a floating diffusion area in response to a plurality of transmission control signals, respectively; 
 a reset transistor comprising a source coupled to the floating diffusion area, a drain coupled to a supply voltage and a gate configured to receive a reset control signal; 
 a driving transistor comprising a source, a drain coupled to the supply voltage and a gate coupled to the floating diffusion area; and 
 a row selection transistor comprising a drain coupled to the source of the driving transistor, a gate configured to receive a row selection signal and a source configured to output the plurality of analog signals, 
   wherein the floating diffusion area and the plurality of storage nodes are formed on a surface of the substrate, and the plurality of memories are formed in the substrate apart from the surface of the substrate.