Polysilicon layer

Abstract

A polysilicon layer including an amorphous polysilicon layer and a crystallized polysilicon layer is provided. The crystallized polysilicon layer is disposed on the amorphous polysilicon layer. Besides, the amorphous polysilicon layer has a first grain size, the crystallized polysilicon layer has a second grain size, and the first grain size is smaller than the second grain size. The amorphous polysilicon layer with a smaller grain size can serve as a base for the following deposition, so that the crystallized polysilicon layer formed thereon has a flatter topography, and thus, the surface roughness is reduced and the Rs uniformity within a wafer is improved.

What is claimed is: 
     
         1 . A polysilicon layer, comprising:
 an amorphous polysilicon layer; and   a crystallized polysilicon layer, disposed on the amorphous polysilicon layer,   wherein the amorphous polysilicon layer has a first grain size, the crystallized polysilicon layer has a second grain size, and the first grain size is smaller than the second grain size.   
     
     
         2 . The polysilicon layer of  claim 1 , wherein the first grain size is about 10-20 nm, and the second grain size is about 25-30 nm. 
     
     
         3 . The polysilicon layer of  claim 1 , wherein a thickness of the amorphous polysilicon layer is smaller than a thickness of the crystallized polysilicon layer. 
     
     
         4 . The polysilicon layer of  claim 3 , wherein a thickness ratio of the amorphous polysilicon layer to the crystallized polysilicon layer is from about 1:2.5 to about 1:6. 
     
     
         5 . The polysilicon layer of  claim 4 , wherein the thickness of the amorphous polysilicon layer is about 100-200 Å, and the thickness of the crystallized polysilicon layer is about 500-600 Å. 
     
     
         6 . The polysilicon layer of  claim 1 , wherein the amorphous polysilicon layer is undoped, while the crystallized polysilicon layer is doped. 
     
     
         7 . The polysilicon layer of  claim 6 , wherein at least a doped layer is disposed in the crystallized polysilicon layer to prevent dopants from diffusing to the amorphous polysilicon layer. 
     
     
         8 . The polysilicon layer of  claim 6 , wherein at least a doped layer is substantially disposed at an interface between the amorphous polysilicon layer and the crystallized polysilicon layer or higher than the interface. 
     
     
         9 . The polysilicon layer of  claim 6 , wherein the amorphous polysilicon layer and the crystallized polysilicon layer have a total height H, and at least a doped layer is disposed larger than or equal to ⅔ H from a top surface of the crystallized polysilicon layer.