Semiconductor device having metal gate and manufacturing method thereof

Abstract

A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device formed thereon, and the first semiconductor device includes a first dummy gate. Next, the dummy gate is removed to form a first gate trench in the first semiconductor device, and the substrate is exposed in a bottom of the first gate trench. Subsequently, an epitaxial channel layer is formed in the first gate trench.

1 . A manufacturing method of a semiconductor device having metal gate comprising:
 providing a substrate having at least a first semiconductor device formed thereon, the first semiconductor device comprising a first dummy gate;   removing the first dummy gate to form a first gate trench in the first semiconductor device, and the substrate is exposed in a bottom of the first gate trench; and   forming an epitaxial channel layer in the first gate trench.   
     
     
         2 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , further comprising an oxide layer formed between the substrate and the first dummy gate. 
     
     
         3 . The manufacturing method of the semiconductor device having metal gate according to  claim 2 , further comprising removing the oxide layer to expose the substrate in the bottom of the first gate trench after removing the first dummy gate. 
     
     
         4 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , further comprising over etching the substrate exposed in the bottom of the first gate trench. 
     
     
         5 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , wherein the first semiconductor device is a p-typed semiconductor device and the epitaxial channel layer comprises Si, Ge, or SiGe. 
     
     
         6 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , wherein the first semiconductor device is an n-typed semiconductor device and the epitaxial channel layer comprises III-V material. 
     
     
         7 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , further comprising a second semiconductor device positioned on the substrate, the second semiconductor device comprising a second dummy gate and an oxide layer, and the oxide layer being positioned between the second dummy gate and the substrate. 
     
     
         8 . The manufacturing method of the semiconductor device having metal gate according to  claim 7 , further comprising removing the second dummy gate to form a second gate trench in the second semiconductor device simultaneously with removing the first dummy gate. 
     
     
         9 . The manufacturing method of the semiconductor device having metal gate according to  claim 8 , wherein the oxide layer is exposed in a bottom of the second gate trench. 
     
     
         10 . The manufacturing method of the semiconductor device having metal gate according to  claim 1 , further comprising forming a high dielectric constant (high-k) gate dielectric layer on the epitaxial channel layer. 
     
     
         11 . The manufacturing method of the semiconductor device having metal gate according to  claim 10 , further comprising sequentially forming a work function metal layer and a filling metal layer on the high-k gate dielectric layer, and the first gate trench being filled up with the filling metal layer. 
     
     
         12 . A semiconductor device having metal gate, comprising:
 a substrate;   a metal gate positioned on the substrate;   a high-k gate dielectric layer; and   an epitaxial channel layer positioned in between the high-k gate dielectric layer and the substrate, and a length of the epitaxial channel layer is larger than a length of the metal gate.   
     
     
         13 . The semiconductor device having metal gate according to  claim 12 , wherein the high-k gate dielectric layer comprises a U shape. 
     
     
         14 . The semiconductor device having metal gate according to  claim 12 , wherein the metal gate comprises at least a work function metal layer and a filling metal layer. 
     
     
         15 . The semiconductor device having metal gate according to  claim 12 , wherein the semiconductor device is a p-typed semiconductor device and the epitaxial channel layer comprises Si, Ge, or SiGe. 
     
     
         16 . The semiconductor device having metal gate according to  claim 12 , wherein the semiconductor device is an n-typed semiconductor device and the epitaxial channel layer comprises III-V material. 
     
     
         17 . The semiconductor device having metal gate according to  claim 12 , further comprising a source/drain formed in the substrate. 
     
     
         18 . The semiconductor device having metal gate according to  claim 17 , wherein the source/drain comprises a doped epitaxial layer, respectively. 
     
     
         19 . The semiconductor device having metal gate according to  claim 12 , wherein a bottom of the epitaxial channel layer and the substrate are coplanar. 
     
     
         20 . The semiconductor device having metal gate according to  claim 12 , wherein a bottom of the epitaxial channel layer and the substrate are non-coplanar.