Junctionless accumulation-mode device isolated from semiconductive substrate by reverse-bias junction

Abstract

A junctionless accumulation-mode (JAM) semiconductive device is isolated from a semiconductive substrate by a reverse-bias band below a prominent feature of a JAM semiconductive body. Processes of making the JAM device include implantation and epitaxy.

What is claimed is: 
     
         1 . A transistor device comprising:
 a bulk substrate;   a semiconductive body extending away from the substrate and including a channel region and adjacent source and drain regions;   a gate electrode above the channel region; and   a reverse-bias junction between the semiconductive body and the bulk semiconductive substrate.   
     
     
         2 . The device of  claim 1 , wherein the reverse-bias junction runs the entire length of the semiconductive body. 
     
     
         3 . The device of  claim 1 , wherein the semiconductive body is a doped semiconductive first body, and the reverse-bias junction is provided by virtue of a semiconductive second body that runs the entire length of the semiconductive first body, the semiconductive second body being differently doped from the semiconductive first body such that the doping differential is sufficient to act as the reverse-bias junction. 
     
     
         4 . The device of  claim 3 , wherein:
 the substrate is a bulk silicon substrate;   the semiconductive first body comprises at least one of silicon and germanium; and   the semiconductive second body comprises a III-V material.   
     
     
         5 . The device of  claim 3 , wherein:
 the substrate is a bulk silicon substrate;   the semiconductive first body comprises a first III-V material; and   the semiconductive second body comprises a second III-V material different from the first III-V material.   
     
     
         6 . The device of  claim 3 , wherein the semiconductive first body and the semiconductive second body are part of a fin that is part of the substrate, such that each of the semiconductive first body, semiconductive second body, and substrate are the same semiconductive material except that doping of at least the semiconductive first body and semiconductive second body are different. 
     
     
         7 . The device of  claim 6 , wherein each of the semiconductive first body, semiconductive second body, and substrate are silicon. 
     
     
         8 . The device of  claim 3 , wherein the semiconductive first body is a first semiconductor material and the semiconductive second body is a second semiconductor material different from the first semiconductive material. 
     
     
         9 . The device of  claim 8 , wherein the substrate is a different material from at least one of the first semiconductor material and the second semiconductor material. 
     
     
         10 . The device of  claim 1 , wherein the semiconductive body is an n-channel junctionless source-channel-drain structure configured to operate in accumulation mode. 
     
     
         11 . The device of  claim 1 , wherein the semiconductive body is a p-channel junctionless source-channel-drain structure configured to operate in accumulation mode. 
     
     
         12 . The device of  claim 1 , wherein the semiconductive body is a semiconductive first body configured as an n-channel, and the reverse-bias junction is provided by virtue of a p-type semiconductive second body that runs the entire length of the semiconductive first body. 
     
     
         13 . The device of  claim 1 , wherein the semiconductive body is a semiconductive first body configured as a p-channel, and the reverse-bias junction is provided by virtue of an n-type semiconductive second body that runs the entire length of the semiconductive first body. 
     
     
         14 . The device of  claim 1 , wherein the semiconductive body includes top and sidewall portions, the device further comprising:
 insulation material covering a lower region of the sidewall portions of the semiconductive body; and   a gate dielectric over the channel region and between the gate electrode and the semiconductive body, each of the gate dielectric and the gate electrode being adjacent to the top and an upper region of each of the sidewall portions, thereby providing multiple gates.   
     
     
         15 . The device of  claim 1 , wherein the device is one of a quantum fin, quantum wire, or quantum ribbon transistor. 
     
     
         16 . A transistor device comprising:
 a bulk substrate;   a doped semiconductive first body extending away from the substrate and including a channel region and adjacent source and drain regions, the semiconductive first body including top and sidewall portions;   a gate electrode above the channel region;   a semiconductive second body between the semiconductive first body and the bulk semiconductive substrate and that runs the entire length of the semiconductive first body, the semiconductive second body being differently doped from the semiconductive first body such that the doping differential is sufficient to act as a reverse-bias junction that inhibits current leakage into the substrate;   insulation material covering a lower region of the sidewall portions of the semiconductive first body; and   a gate dielectric over the channel region and between the gate electrode and the semiconductive first body, each of the gate dielectric and the gate electrode being adjacent to the top and an upper region of each of the sidewall portions, thereby providing multiple gates.   
     
     
         17 . The device of  claim 16 , wherein the semiconductive first body and the semiconductive second body are part of a fin that is part of the substrate, such that each of the semiconductive first body, semiconductive second body, and substrate are the same semiconductive material except that doping of at least the semiconductive first body and semiconductive second body are different. 
     
     
         18 . A method for forming a transistor device comprising:
 providing a bulk substrate;   providing a doped semiconductive first body extending away from the substrate and including a channel region and adjacent source and drain regions, the semiconductive first body including top and sidewall portions;   providing a gate electrode above the channel region; and   providing a semiconductive second body between the semiconductive first body and the bulk semiconductive substrate and that runs the entire length of the semiconductive first body, the semiconductive second body being differently doped from the semiconductive first body such that the doping differential is sufficient to act as a reverse-bias junction that inhibits current leakage into the substrate.   
     
     
         19 . The method of  claim 18 , wherein each of the semiconductive first body, the semiconductive second body, and the substrate are the same semiconductive material except that doping of at least the semiconductive first body and semiconductive second body are different. 
     
     
         20 . The method of  claim 18 , wherein the semiconductive first body is a first semiconductor material and the semiconductive second body is a second semiconductor material different from the first semiconductive material.