US2015011065A1PendingUtilityA1

Semiconductor device and method for manufacturing the same

Assignee: ROHM CO LTDPriority: Aug 4, 2004Filed: Sep 23, 2014Published: Jan 8, 2015
Est. expiryAug 4, 2024(expired)· nominal 20-yr term from priority
Inventors:Masaru Takaishi
H10P 30/222H10D 64/01346H10D 64/01306H10D 62/054H10D 62/111H10D 30/668H10D 30/0297H10D 64/516H10D 62/393H10D 62/292H01L 29/0634H01L 21/28211H01L 21/28035H01L 29/66734
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Claims

Abstract

A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device having a drift layer of a first conductivity type on a semiconductor substrate of the first conductivity type, the method comprising the steps of:
 forming a semiconductor layer of a second conductivity type different from the first conductivity type on the semiconductor substrate;   forming a concave portion that penetrates through the semiconductor layer and reaches the semiconductor substrate;   forming the drift layer along an inner wall surface of the concave portion by introducing impurities of the first conductivity type onto the semiconductor layer exposed to the inner wall surface of the concave portion;   forming an insulating film on the inner wall surface of the concave portion;   filling an electrically conductive filler into a bottom part region of the concave portion after the insulating film is formed;   removing the insulating film while allowing the filler to serve as a mask;   forming a gate insulating film thinner than the insulating film on an exposed surface of the inner wall surface of the concave portion exposed by the removing step, and simultaneously forming an inter-conductor insulating film on an exposed surface of the filler;   forming a gate electrode that faces the inner wall surface of the concave portion and the filler with the gate insulating film and the inter-conductor insulating film respectively interposed therebetween;   forming a base region of the second conductivity type having an exposed part exposed to the inner wall surface of the concave portion on a surface part of the semiconductor layer by introducing impurities of the second conductivity type from a surface of the semiconductor layer;   forming a first conductivity type region exposed to the inner wall surface of the concave portion by introducing impurities of the first conductivity type onto a surface part of the base region at an edge of the concave portion;   wherein the filler is filled into the bottom part region of the concave portion that has a predetermined depth which is deeper than the exposed part of the base region in the concave portion, and   the base region is formed so that the exposed part of the base region faces to the gate electrode with the gate insulating film interposed therebetween.   
     
     
         2 . The method of  claim 1 , wherein the step of filling the filler includes the steps of:
 supplying the filler to shallower portion than the predetermined depth within the concave portion; and   subjecting the filler to etchback up to the predetermined depth after the step of supplying the filler.   
     
     
         3 . The method of  claim 1 , wherein the step of forming the base region includes a step of introducing impurities of the second conductivity type onto the inner wall surface of the concave portion. 
     
     
         4 . The method of  claim 1 , wherein the step of forming the inter-conductor insulating film includes a step of forming the inter-conductor insulating film that covers a whole of the exposed surface of the filler. 
     
     
         5 . The method of  claim 1 , wherein the step of forming the drift layer includes a step of defining a resurf layer in the semiconductor layer that contacts with the drift layer. 
     
     
         6 . The method of  claim 5 , wherein the step of forming the concave portion includes a step of forming a plurality of the concave portions, and
 the step of forming the drift layer includes a step of forming the drift layer so that the resurf layer is disposed between one drift layer through which one of an adjacent pair of the concave portions penetrates and another drift layer through which the other of the adjacent pair of the concave portions penetrates.   
     
     
         7 . The method of  claim 1 , wherein the step of forming the base region includes a step of forming the base region having an impurity concentration higher than an impurity concentration of the semiconductor layer. 
     
     
         8 . The method of  claim 1 , wherein the step of forming the drift layer includes a step of introducing impurities of the first conductivity type obliquely against the inner wall surface of the concave portion. 
     
     
         9 . The method of  claim 1 , wherein the step of forming the drift layer includes a step of forming the drift layer having an impurity concentration lower than an impurity concentration of the semiconductor substrate. 
     
     
         10 . The method of  claim 1 , wherein the step of forming the concave portion includes the steps of:
 forming a mask having an opening selectively in an area in which the concave portion is to be formed, on the semiconductor layer;   removing the semiconductor layer by etching through the opening of the mask.   
     
     
         11 . The method of  claim 1 , wherein the step of forming the concave portion includes a step of forming the concave portion having a carved bottom part toward the semiconductor substrate. 
     
     
         12 . The method of  claim 1 , wherein the step of forming the insulating film includes a step of forming a thermal oxide film by heating the semiconductor layer. 
     
     
         13 . The method of  claim 1 , wherein the step of forming the inter-conductor insulating film includes a step of forming a thermal oxide film by heating the semiconductor layer. 
     
     
         14 . The method of  claim 1 , wherein the step of filling the filler includes the steps of:
 filling a polysilicon into the concave portion;   introducing impurities to the polysilicon after the step of filling the polysilicon.   
     
     
         15 . The method of  claim 1 , wherein the step of forming the gate electrode includes the steps of:
 filling a polysilicon into the concave portion;   introducing impurities to the polysilicon after the step of filling the polysilicon.   
     
     
         16 . The method of  claim 1 , wherein the step of forming the gate electrode includes a step of forming the gate electrode having a length shorter than a length of the filler, in regard to a depth direction of the concave portion. 
     
     
         17 . The method of  claim 1  further comprising the steps of:
 forming an electrode-insulating film having an opening from which the first conductivity type region is exposed after the step of forming the first conductivity type region; 
 forming an electrode that is brought into contact with the first conductivity type region inside the opening of the electrode-insulating film, on the semiconductor substrate. 
 
     
     
         18 . The method of  claim 1 , wherein the semiconductor substrate provides a drain region of the first conductivity type, and the first conductivity type region provides a source region. 
     
     
         19 . The method of  claim 1 , wherein the semiconductor substrate provides a collector region of the second conductivity type, and the first conductivity type region provides an emitter region.

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