De-pop on-device decoupling for bga

Abstract

Embodiments of the invention place surface-mount devices such as decoupling capacitors, resistors or other devices directly on the underside of a ball grid array (BGA) electronic integrated circuit (EIC) package, in place of de-populated BGA pads.

What is claimed is: 
     
         1 . An electronic integrated circuit (EIC) package comprising:
 an EIC substrate;   an array of ball grid array (BGA) pads on a first side of said EIC substrate, arranged in a grid pattern of rows and columns; and   contact pads on said first side of said EIC substrate to accommodate electrical connection of a surface-mount device, wherein said surface-mount device occupies a grid location of said grid pattern in place of one or more BGA pads.   
     
     
         2 . The EIC package of  claim 1 , wherein said contact pads comprise at least two adjacent contact pads. 
     
     
         3 . The EIC package of  claim 2 , wherein each of the contact pads is connected to an adjacent BGA pad by a conductor on said first side of said EIC substrate. 
     
     
         4 . The EIC package of  claim 1 , wherein said surface-mount device comprises a two-port device. 
     
     
         5 . The EIC package of  claim 4 , wherein said surface-mount device comprises a decoupling capacitor. 
     
     
         6 . The EIC package of  claim 1 , wherein said surface-mount device is selected from a set of a capacitor, a resistor, an inductor, a diode, a transistor, a capacitor array, and a resistor-capacitor circuit. 
     
     
         7 . The EIC package of  claim 1 , wherein said BGA grid comprises a pitch of between about 0.4 mm×0.4 mm and about 1.27 mm×1.27 mm. 
     
     
         8 . The EIC package of  claim 7 , wherein said BGA grid comprises an irregular pitch. 
     
     
         9 . A computer-aided design tool for accommodating a surface-mount device on a first surface of a ball grid array (BGA) electronic integrated circuit (EIC) package, said tool comprising:
 a design tool configured to identify, in an EIC configuration of BGA pads in a grid pattern on said first side of said EIC package, at least two contact pads for forming directly on said first surface, said contact pads for direct mounting of and connection to said surface-mount device, wherein said surface-mount device occupies a grid location of said grid pattern in place of one or more BGA pads.   
     
     
         10 . The computer-aided design tool of  claim 9 , wherein each of the contact pads is connected to an adjacent BGA pad by a conductor on said first side of said EIC package. 
     
     
         11 . The computer-aided design tool of  claim 9 , wherein said surface-mount device comprises a two-port device. 
     
     
         12 . The computer-aided design tool of  claim 11 , wherein said surface-mount device comprises a decoupling capacitor. 
     
     
         13 . The computer-aided design tool of  claim 9 , wherein said surface-mount device is selected from a set of a capacitor, a resistor, an inductor, a diode, a transistor, a capacitor array, and a resistor-capacitor circuit. 
     
     
         14 . The computer-aided design tool of  claim 9 , wherein said BGA grid comprises a pitch of between about 0.4 mm×0.4 mm and about 1.27 mm×1.27 mm. 
     
     
         15 . The computer-aided design tool of  claim 14 , wherein said BGA grid comprises an irregular pitch. 
     
     
         16 . The EIC package of  claim 1 , wherein the surface-mount device is placed diagonally with respect to the grid pattern. 
     
     
         17 . The computer-aided design tool of  claim 9 , wherein the surface-mount device is placed diagonally with respect to the grid pattern.