Photonic integrated circuit and fabrication process

Abstract

A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.

1 - 24 . (canceled) 
     
     
         25 . An integrated circuit comprising:
 a silicon layer;   a waveguide carried within said silicon layer;   at least one other photonic component carried within said silicon layer;   a first insulating layer above a first side of said silicon layer;   at least one metallization level encapsulated by said first insulating layer;   a second insulating layer above a second side of said silicon layer; and   a laser source optically coupled to said waveguide and comprising a gain medium encapsulated by said second insulating layer.   
     
     
         26 . The integrated circuit according to  claim 25 , wherein said laser source comprises at least one an additional waveguide optically coupled to said waveguide above the second side of said silicon layer, and wherein said at least one additional waveguide is encapsulated by said second insulating layer. 
     
     
         27 . The integrated circuit according to  claim 26 , wherein said gain medium is adjacent said at least one additional waveguide. 
     
     
         28 . The integrated circuit according to  claim 26 , wherein said gain medium is spaced apart from said at least one additional waveguide by a portion of said second insulating having a thickness less than or equal to 100 nm. 
     
     
         29 . The integrated circuit according to  claim 25 , wherein said laser source further comprises at least one additional waveguide above the first side of said silicon layer and optically coupled to said waveguide; wherein said at least one additional waveguide is encapsulated by said first insulating layer; and wherein said gain medium is adjacent the second side of said silicon layer. 
     
     
         30 . The integrated circuit according to  claim 29 , wherein said gain medium is spaced apart from the second side of said silicon layer by a distance of 100 nm. 
     
     
         31 . The integrated circuit according to  claim 25 , wherein said silicon layer comprises a coupler; and wherein said first insulating layer comprises a metal mirror facing said coupler. 
     
     
         32 . The integrated circuit according to  claim 31 , wherein said metal mirror is carried within the first arranged in the at least one metallization level opposite the first side of the silicon layer. 
     
     
         33 . The integrated circuit according to  claim 25 , further comprising a grating coupler carried within said silicon layer, said grating coupler having a relief surface facing said first insulating layer. 
     
     
         34 . The integrated circuit according to  claim 25 , further comprising a heat-dissipating radiator carried within said first insulting layer and coupled to said silicon layer opposite said gain medium. 
     
     
         35 . The integrated circuit according to  claim 25 , further comprising a modulator carried within said silicon layer, said modulator having a relief surface facing said first insulating layer and another surface opposite the relief surface and facing said second insulating layer; and wherein said at least one metallization level is coupled to the relief surface. 
     
     
         36 . The integrated circuit according to  claim 25 , further comprising a substrate carrying said first insulating layer. 
     
     
         37 . The integrated circuit according to  claim 35 , further comprising a substrate carrying said first insulating layer; and wherein said at least one metallization level comprises a shield configured to shield said modulator from said substrate. 
     
     
         38 . An integrated circuit comprising:
 a semiconductor layer;   a waveguide carried within said semiconductor layer;   a first insulating layer carried by a first side of said semiconductor layer;   at least one metallization level carried within said first insulating layer;   a second insulating layer carried by a second side of said semiconductor layer; and   a laser source optically coupled to said waveguide and comprising a gain medium carried within said second insulating layer.   
     
     
         39 . The integrated circuit according to  claim 38 , wherein said semiconductor layer comprises silicon. 
     
     
         40 . The integrated circuit according to  claim 38 , wherein said laser source comprises at least one an additional waveguide optically coupled to said waveguide adjacent the second side of said semiconductor layer, and wherein said at least one additional waveguide is carried within said second insulating layer. 
     
     
         41 . The integrated circuit according to  claim 40 , wherein said gain medium is adjacent said at least one additional waveguide. 
     
     
         42 . An integrated circuit comprising:
 a silicon layer;   a modulator carried within said silicon layer and having first and second opposing surfaces;   a first insulating layer above a first side of the silicon layer   at least one metallization level encapsulated by said first insulating layer and coupled to the first surface of said modulator; and   a second insulating layer above a second side of the silicon layer and above the second surface of said modulator;   no other substrate facing the second surface of said modulator.   
     
     
         43 . The integrated circuit according to  claim 42 , further comprising a substrate carrying said first insulating layer. 
     
     
         44 . An integrated circuit comprising:
 a substrate;   a silicon layer;   a modulator carried within said silicon layer and having a first surface facing said substrate and a second surface opposite the first surface;   a first insulating layer arranged between a first side of said silicon layer and said substrate;   at least one metallization level encapsulated by said first insulating layer and coupled to the first surface of said modulator; and   a second insulating layer arranged above a second side of said silicon layer and above the second surface of said modulator.   
     
     
         45 . The integrated circuit according to  claim 44 , wherein said at least one metallization level comprises a shield configured to shield the modulator from said substrate. 
     
     
         46 . A method of making an integrated circuit, comprising:
 forming a semiconductor layer above a buried insulating layer, the buried insulating layer being above a carrier substrate, a waveguide, and at least one other photonic component;   forming, adjacent a first side of the semiconductor layer, at least one metallization level within a first insulating layer;   removing the carrier substrate and the buried insulating layer to at least one of expose and be adjacent a second side of the semiconductor layer opposite the first side; and   forming a laser source optically coupled to the waveguide, wherein forming the laser source comprises forming at least the gain medium of the laser source in a second insulating layer adjacent the second side.   
     
     
         47 . The method according to  claim 46 , wherein forming the semiconductor layer comprises forming a silicon layer. 
     
     
         48 . The method according to  claim 46 , wherein forming the laser source comprises:
 forming, adjacent at least one additional insulating layer adjacent the second side;   forming, adjacent the at least one additional insulating layer, an etched semiconductor heterostructure defining said gain medium; and   depositing another insulating layer adjacent the at least one additional insulating layer and the heterostructure to define the second insulating layer.   
     
     
         49 . The method according to  claim 48 , wherein forming the laser source further comprises, prior to forming of the gain medium, forming, adjacent the second side of the semiconductor layer, at least one additional waveguide optically coupled to the waveguide. 
     
     
         50 . The method according to  claim 49 , wherein forming the at least one additional waveguide comprises:
 depositing an additional semiconductor layer adjacent the additional insulating layer;   etching the additional semiconductor layer; and   depositing at least one additional insulating layer above the etched additional semiconductor layer and the additional insulating layer;   the etched heterostructure being formed above the at least one additional insulating layer.   
     
     
         51 . The method according to  claim 46 , further comprising, prior to forming the at least one metallization layer, forming, above the first side of the semiconductor layer, at least an additional waveguide optically coupled to the waveguide. 
     
     
         52 . The method according to  claim 46 , further comprising:
 forming a coupler in the semiconductor layer; and   forming a metal mirror within the first insulating layer facing the coupler.   
     
     
         53 . The method according to  claim 52 , wherein the metal mirror is formed while forming tracks of the at least one metallization level.