Field effect transistor with fin structure

Abstract

A FET with a fin structure includes a substrate, an isolation structure and a gate structure. The substrate includes at least one fin structure. The fin structure includes two source/drain regions and a gate channel region between the two source/drain regions. The isolation structure is disposed on the substrate and surrounds the fin structure to expose an upper portion of the fin structure. A width of the gate channel region of the exposed upper portion of the fin structure is less than each of widths of the source region and the drain region. A gate structure covering two sidewalls of the gate channel region of the exposed upper portion of the fin structure is formed. Two sidewalls of the gate structure contact two facing sidewalls of the two source/drain regions, respectively.

What is claimed is: 
     
         1 . A field effect transistor with a fin structure comprising:
 a substrate comprising at least one fin structure comprising two source/drain regions and a gate channel region between the two source/drain regions;   an isolation structure disposed on the substrate and surrounding the fin structure to expose an upper portion of the fin structure, wherein a width of the gate channel region of the exposed upper portion of the fin structure is less than each of widths of the source region and the drain region; and   a gate structure covering two sidewalls of the gate channel region of the exposed upper portion of the fin structure, wherein two sidewalls of the gate structure contact two facing sidewalls of the two source/drain regions, respectively.   
     
     
         2 . The field effect transistor with a fin structure according to  claim 1 , further comprising a hard mask atop the gate channel region of the fin structure. 
     
     
         3 . The field effect transistor with a fin structure according to  claim 1 , wherein the gate structure further covers a top of the gate channel region of the fin structure. 
     
     
         4 . The field effect transistor with a fin structure according to  claim 1 , wherein the gate structure further covers the hard mask.