Electrostatic protection circuit

Abstract

An electrostatic protection circuit includes a clamp circuit between a first power source line and a trigger circuit. The clamp circuit has a threshold voltage at which the response to changes in voltage becomes non-linear such that electric current passing through the clamp circuit varies non-linearly. The trigger circuit is connected between the clamp circuit and a second power source line. The trigger circuit outputs a trigger signal to a buffer circuit according to the electric current passing through the clamp circuit. The buffer circuit is configured to output a drive signal to a switch circuit in response to the trigger signal. The switch circuit has a main current path connected between the first power source line and the second power source line, and switches the conduction state of the main current path in response to the drive signal.

What is claimed is: 
     
         1 . An electrostatic protection circuit, comprising:
 a clamp circuit connected between a first power source line and a first connection node, the clamp circuit having a response to a voltage difference between the first power source line and the first connection node such that an electric current passing through the clamp circuit varies non-linearly upon reaching a threshold voltage;   a trigger circuit connected between the first connection node and a second power source line, the trigger circuit configured to output a trigger signal in response to the electric current passing through the clamp circuit;   a buffer circuit that is biased by a voltage between the first connection node and the second power source line, and configured to output a drive signal in response to the trigger signal; and   a switch circuit having a main current path connected between the first power source line and the second power source line, the switch circuit configured to switch the conduction state of the main current path between on and off in response to the drive signal.   
     
     
         2 . The electrostatic protection circuit according to  claim 1 , wherein the trigger circuit includes a resistor and a capacitor connected in series. 
     
     
         3 . The electrostatic protection circuit according to  claim 1 , wherein the clamp circuit includes a diode connected between the first power source line and the first connection node. 
     
     
         4 . The electrostatic protection circuit according to  claim 3 , wherein the diode has an anode connected to the first connection node and a cathode connected to first power source line. 
     
     
         5 . The electrostatic protection circuit according to  claim 3 , wherein the diode has a cathode connected to the first connection node and an anode connected to first power source line. 
     
     
         6 . The electrostatic protection circuit according to  claim 1 , wherein the clamp circuit includes a plurality of diodes connected between the first power source line and the first connection node. 
     
     
         7 . The electrostatic protection circuit according to  claim 6 , wherein at least one of the diodes in the plurality is connected in a reverse biased manner relative to a positive potential applied to the first power source line with respect to the second power source line. 
     
     
         8 . The electrostatic protection circuit according to  claim 6 , wherein at least one of the diodes in the plurality is connected in a forward biased manner relative to a positive potential applied to the first power source line with respect to the second power source line. 
     
     
         9 . The electrostatic protection circuit according to  claim 1 , wherein the clamp circuit includes a resistor. 
     
     
         10 . The electrostatic protection circuit according to  claim 1 , wherein the buffer circuit includes a complementary metal-oxide-semiconductor (CMOS) inverter. 
     
     
         11 . The electrostatic protection circuit according to  claim 1 , wherein the buffer circuit includes:
 a transistor having a source-drain path between the first connection node and the second power source line and a gate electrode connected to the trigger signal output from the trigger circuit, and   a gate protection diode connected between the gate electrode and a source electrode of the transistor.   
     
     
         12 . The electrostatic protection circuit according to  claim 1 , wherein the switch circuit includes:
 an n-channel metal-oxide-semiconductor (NMOS) transistor having a drain electrode connected to the first power source line, a source electrode and a back gate electrode connected to the second power source line, and a gate electrode connected to the drive signal output from the buffer circuit.   
     
     
         13 . The electrostatic protection circuit according to  claim 12 , wherein a gate protection diode is connected between the gate electrode and the source electrode of the NMOS transistor. 
     
     
         14 . A protection circuit connected between a power source and a protected internal circuit, the protection circuit comprising:
 a clamp circuit connected between a first power source line at a first power source potential and a first connection node, the clamp circuit having a response to a voltage difference between the first power source line and the first connection node such that an electric current passing through the clamp circuit varies non-linearly upon reaching a threshold voltage;   a trigger circuit connected between the first connection node and a second power source line at a second power source potential, the trigger circuit configured to output a trigger signal from a trigger output node in response to the electric current passing through the clamp circuit;   a buffer circuit having a buffer input node connected to the trigger output node, the buffer circuit biased by a voltage difference between a potential at the first connection node and the second power source potential, and configured to output a drive signal from a buffer output node in response to the trigger signal; and   a switch circuit configured to electrically connect the first power source line to the second power source line in response to the drive signal.   
     
     
         15 . The protection circuit according to  claim 14 , wherein the clamp circuit is a diode. 
     
     
         16 . The protection circuit according to  claim 15 , wherein the switch circuit is a n-channel metal-oxide semiconductor (NMOS) transistor having a source-drain path between the first and second power source lines, a back-gate electrode connected the second power source line, and a gate electrode connected to the buffer output node. 
     
     
         17 . The protection circuit according to  claim 13 , further comprising:
 a first gate protection diode connected between the first connection node and the buffer input node; and   a second gate protection node connected between the buffer output node and the second power source line.   
     
     
         18 . An electrostatic protection circuit, comprising:
 a first diode connected between a first power source line and a first connection node, the first diode having a response to a voltage difference between the first power source line and the first connection node such that an electric current passing through the first diode varies non-linearly upon reaching a threshold voltage;   a trigger circuit connected between the first connection node and a second power source line, the trigger circuit configured to output a trigger signal in response to the electric current passing through the first diode;   a buffer circuit that is biased by a voltage between the first connection node and the second power source line, and configured to output a drive signal in response to the trigger signal; and   a switch circuit having a main current path connected between the first power source line and the second power source line, the switch circuit configured to switch the conduction state of the main current path between on and off in response to the drive signal   
     
     
         19 . The electrostatic protection circuit of  claim 18 , further comprising:
 a second diode connected in series with the first diode between the first power source line and the first connection node.   
     
     
         20 . The electrostatic protection circuit of  claim 19 , wherein the first diode is connected in a reverse-bias manner with respect to a positive potential on the first power source line, and the second diode is connected in a forward-bias manner with respect to the positive potential on the first power source line.