Semiconductor manufacturing process and structure thereof

Abstract

A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.

What is claimed is: 
     
         1 . A semiconductor structure at least includes:
 a silicon substrate having a surface, at least one connection pad formed on the surface and a protection layer formed on the surface, the protection layer covers the connection pad and comprises at least one first opening revealing the connection PAD;   at least one first under bump metallurgy layer having a first ring wall, the first under bump metallurgy layer covers the protection layer and the connection pad;   at least one first buffer layer formed on the first under bump metallurgy layer, the first buffer layer comprises a coupling portion, a cladding portion and a second ring wall;   a support layer formed on the protection layer, the first under bump metallurgy layer and the first buffer layer, the support layer comprises at least one second opening revealing the coupling portion of the first buffer layer, wherein the first ring wall of the first under bump metallurgy layer, the second ring wall and the cladding portion of the first buffer layer are cladded by the support layer; and   at least one connection portion formed at the second opening, the connection portion covers the coupling portion of the first buffer layer.   
     
     
         2 . The semiconductor structure in accordance with  claim 1 , wherein the connection portion includes a second under bump metallurgy layer, a second buffer layer and a soldering layer, the second under bump metallurgy layer is formed at the second opening and covers the coupling portion of the first buffer layer, the second buffer layer covers the second under bump metallurgy layer, and the soldering layer covers the second buffer layer. 
     
     
         3 . The semiconductor structure in accordance with  claim 2 , wherein the support layer comprises a top surface, the second under bump metallurgy layer covers the top surface. 
     
     
         4 . The semiconductor structure in accordance with  claim 1 , wherein the material of the first under bump metallurgy layer is selected from one of titanium-copper alloy or titanium-tungsten-copper alloy. 
     
     
         5 . The semiconductor structure in accordance with  claim 1 , wherein the material of the support layer is selected from one of Polyimide, Poly-p-phenylene benzo-bisoxazazole, or Benezocy-clobutene. 
     
     
         6 . The semiconductor structure in accordance with  claim 2 , wherein the material of the second under bump metallurgy layer is selected from one of titanium-copper alloy or titanium-tungsten-copper alloy. 
     
     
         7 . The semiconductor structure in accordance with  claim 1 , wherein the material of the first buffer layer is selected from one of copper or nickel. 
     
     
         8 . The semiconductor structure in accordance with  claim 2 , wherein the material of the second buffer layer is selected from one of copper, nickel, or copper-nickel alloy. 
     
     
         9 . The semiconductor structure in accordance with  claim 2 , wherein the coupling portion of the first buffer layer comprises a coupling surface, the second under bump metallurgy layer comprises an abutting edge in contact with the coupling surface.