Power semiconductor device and fabrication method thereof

Abstract

Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.

What is claimed is: 
     
         1 . A method of fabricating a power semiconductor device, comprising:
 forming a source electrode and a drain electrode on a substrate;   forming a dielectric layer between the source electrode and the drain electrode;   etching a part of the dielectric layer to form an etched part;   simultaneously forming a gate electrode on the etched part and a field plate on the dielectric layer between the etched part and the drain electrode; and   forming a metal configured to connect the field plate and the source electrode on an equal plan on which the field plate is formed.   
     
     
         2 . A method of fabricating a power semiconductor device, comprising:
 forming a source electrode and a drain electrode on a substrate;   forming a dielectric layer between the source electrode and the drain electrode;   etching a part of the dielectric layer to form an etched part;   simultaneously forming a gate electrode on the etched part and a first field plate on the dielectric layer between the etched part and the drain electrode;   forming a metal on the source electrode and the first field plate; and   forming a second field plate on the metal to be spaced apart from the gate electrode.