Semiconductor device and method of manufacturing same

Abstract

A semiconductor device includes: a first conductive type semiconductor device; a first conductive type drift region formed by epitaxial growth on the semiconductor substrate; a plurality of first conductive type vertical implantation regions formed by multistage ion implantation in the drift region, the vertical implantation regions having a prescribed vertical implantation width and a prescribed drift region width; an anode electrode disposed on the front surface of the drift region opposite to the semiconductor substrate, the anode electrode being in Schottky contact with the drift region and in ohmic contact with the first conductive type vertical implantation regions; and a cathode electrode disposed on the rear surface of the semiconductor substrate opposite to the drift region, the cathode electrode being in ohmic contact with the semiconductor substrate.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first conductive type semiconductor substrate;   a first conductive type drift region formed by epitaxial growth over the semiconductor substrate;   a plurality of second conductive type vertical implantation regions formed in the drift region by multistage ion implantation, the second conductive type vertical implantation regions having a prescribed width and being at a prescribed distance from each other in the drift region;   an anode electrode disposed on a front surface of the drift region opposite to the semiconductor substrate, the anode electrode being in Schottky contact with the drift region and in ohmic contact with the second conductive type vertical implantation regions; and   a cathode electrode disposed on a rear surface of the semiconductor substrate opposite to the drift region, the cathode electrode being in ohmic contact with the semiconductor substrate.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein a thickness of the drift region formed by the epitaxial growth is 7 μm to 9 μm. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein a resistivity of the drift region formed by the epitaxial growth is 0.7 Ωcm. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein said width of the vertical implantation regions is 0.8 μm to 1.0 μm. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein said distance between the vertical implantation regions is 3.0 μm to 3.2 μm. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the drift region includes a prescribed number of field limiting rings formed around an area where the vertical implantation regions are formed. 
     
     
         7 . The semiconductor device according to  claim 6 , wherein the number of said field limiting rings is two or greater. 
     
     
         8 . The semiconductor device according to  claim 7 , wherein a gap between the field limiting rings is 1.6 μm to 3.2 μm. 
     
     
         9 . The semiconductor device according to  claim 8 , wherein the gap between the field limiting rings is 2.3 μm to 2.6 μm. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the vertical implantation regions are formed in the drift region so as to form a stripe pattern or dot pattern in a plan view. 
     
     
         11 . The semiconductor device according to  claim 1 , further comprising a first conductive type high resistance layer formed by epitaxial growth on the semiconductor substrate,
 wherein the drift region is formed on the high resistance layer.   
     
     
         12 . The semiconductor device according to  claim 6 , further comprising an insulating layer disposed on the field limiting rings,
 wherein the anode electrode extends over the field limiting rings across the insulating layer.   
     
     
         13 . A method of manufacturing a semiconductor device, comprising:
 forming an epitaxial growth layer on a substrate;   performing multistage ion implantation to form vertical implantation regions in the epitaxial growth layer;   performing ion implantation to form field limiting rings in the epitaxial growth layer;   performing heat treatment to activate the implanted ions;   forming an insulating layer on an entire surface of the epitaxial growth layer;   patterning the insulating layer to form a barrier metal on the epitaxial growth layer;   forming an anode electrode on the barrier metal; and   forming a cathode electrode on a rear surface of the substrate.   
     
     
         14 . The method of manufacturing a semiconductor device according to  claim 13 , wherein the multistage ion implantation includes two or more steps. 
     
     
         15 . The method of manufacturing a semiconductor device according to  claim 13 , wherein the multistage ion implantation includes four steps, with acceleration energies respectively being 2 MeV, 1.1 MeV, 500 keV, and 100 keV. 
     
     
         16 . The method of manufacturing a semiconductor device according to  claim 15 , wherein a dose when an acceleration energy is 100 keV is 4×10 12  atoms/cm 2  to 8×10 12  atoms/cm 2 . 
     
     
         17 . The method of manufacturing a semiconductor device according to  claim 16 , wherein a concentration rate of the dose at the acceleration energy of 500 keV is reduced by a fixed quantity of 5% to 30% of the dose at the acceleration energy of 100 keV, a concentration rate of the dose at the acceleration energy of 1.1 MeV is reduced by said fixed quantity from the dose at 500 keV, and a concentration rate of the dose at the acceleration energy of 2 MeV is reduced by said fixed quantity from the dose at 1.1 MeV. 
     
     
         18 . The method of manufacturing a semiconductor device according to  claim 16 , wherein a concentration rate of the dose at an acceleration energy of 500 keV is reduced from the dose at the acceleration energy of 100 keV at a fixed rate of 5% to 30%, a concentration rate of the dose at the acceleration energy of 1.1 MeV is reduced from the dose at 500 keV at said fixed rate, and a concentration rate of the dose at the acceleration energy of 2 MeV is reduced from the dose at 1.1 MeV at said fixed rate. 
     
     
         19 . The method of manufacturing a semiconductor device according to  claim 13 , wherein, after the multistage ion implantation, heat treatment is performed at a temperature of 1050° C. to 1150° C. and a time of 30 minutes. 
     
     
         20 . The method of manufacturing a semiconductor device according to  claim 13 , wherein the step of performing multistage ion implantation and the step of performing ion implantation are performed at the same time.