Light emitting diode and method of manufacturing the same

Abstract

The present invention relates to a light emitting diode and a method of manufacturing same. The light emitting diode includes: a first conductive semiconductor layer; a plurality of mesas that are disposed spaced apart from one another on the first conductive semiconductor layer, each mesa including an active layer and a second conductive semiconductor layer; reflective electrodes that are respectively disposed on the plurality of mesas and come into ohmic contact with the second conductive semiconductor layer; openings that cover the plurality of mesas and the first conductive semiconductor layer, are electrically insulated from the mesas, and expose the reflective electrodes to the upper region of each mesa; and a current spreading layer that comes into ohmic contact with the first conductive semiconductor layer. Thus, a light emitting diode that improves current spreading performance may be provided.

1 . A light emitting diode, comprising:
 a first conductivity-type semiconductor layer;   mesas separated from each other and disposed on the first conductivity-type semiconductor layer, each mesa comprising an active layer and a second conductivity-type semiconductor layer;   reflective electrodes respectively disposed on the mesas, and in ohmic contact with the second conductivity-type semiconductor layers; and   a current spreading layer disposed on the mesas and in ohmic contact with the first conductivity-type semiconductor layer, the current spreading layer being electrically isolated from the mesas, and comprising first openings exposing the reflective electrodes.   
     
     
         2 . The light emitting diode of  claim 1 , wherein:
 the mesas each have a longitudinally elongated shape and extend parallel to each other across the substrate; and   the first openings are each disposed closer to first ends of the mesas.   
     
     
         3 . The light emitting diode of  claim 1 , wherein each of the reflective electrodes comprises a reflective metal layer and a barrier metal layer, the barrier metal layer disposed on an upper surface and a side surface of the reflective metal layer. 
     
     
         4 . The light emitting diode of  claim 3 , wherein each of the reflective electrodes further comprises a stress relieving layer disposed between the reflective metal layer and the barrier metal layer, the stress relieving layer having a coefficient of thermal expansion that is between the coefficient of thermal expansion of the reflective metal layer and the coefficient of thermal expansion of the barrier metal layer. 
     
     
         5 . The light emitting diode of  claim 1 , further comprising:
 a first pad electrically connected to the current spreading layer;   an upper insulation layer disposed on the current spreading layer and comprising second openings exposing the reflective electrodes; and   a second pad disposed on the upper insulation layer and electrically connected to the reflective electrodes exposed through the first and second openings.   
     
     
         6 . The light emitting diode of  claim 1 , further comprising:
 a lower insulation layer disposed between and electrically isolating the current spreading layer and the mesas, the lower insulation layer comprising third openings exposing the reflective electrodes.   
     
     
         7 . The light emitting diode of  claim 6 , wherein the first opening has a greater width than the third opening such that all of the third opening is exposed through the first opening. 
     
     
         8 . The light emitting diode of  claim 7 , further comprising:
 an upper insulation layer disposed on at least a portion of the current spreading layer and comprising second openings exposing the reflective electrodes, the upper insulation layer disposed on side surfaces of the first openings.   
     
     
         9 . The light emitting diode of  claim 6 , wherein the lower insulation layer comprises a reflective dielectric layer. 
     
     
         10 . The light emitting diode of  claim 1 , further comprising:
 a substrate,   wherein the first conductive semiconductor is disposed on a first surface of the substrate, and an opposing second surface of the substrate is textured.   
     
     
         11 . The light emitting diode chip of  claim 10 , wherein the second substrate surface texture is formed by grinding followed by treatment with phosphoric acid or a mixture of sulfuric acid and phosphoric acid. 
     
     
         12 . The light emitting diode chip of  claim 10 , wherein the substrate further comprises a chamfered structure at a corner of the second surface. 
     
     
         13 . The light emitting diode chip of  claim 10 , wherein the substrate further comprises an anti-reflective layer disposed on the second surface. 
     
     
         14 . The light emitting diode of  claim 4 , wherein:
 the reflective metal layer comprises one of Al, Al alloys, Ag, and Ag alloys;   the barrier metal layer comprises one of W, TiW, Mo, Ti, Cr, Pt, Rh, Pd, and Ni; and   the stress relieving layer comprises a single layer of Cu, Ni, Pt, Ti, Rh, Pd or Cr, or a composite of layers comprising metals selected from Cu, Ni, Pt, Ti, Rh, Pd, and Au.   
     
     
         15 . The light emitting diode of  claim 4 , wherein:
 the reflective metal layer comprises Al or Al alloys;   the barrier metal layer comprises one of Ti, Cr, Pt, Rh, Pd, and Ni; and   the stress relieving layer comprise a single layer of Ag or Cu, or a composite of layers comprising metals selected from Ni, Au, Cu, and Ag.   
     
     
         16 . The light emitting diode of  claim 4 , wherein:
 the reflective metal layer comprises Ag or Ag alloys;   the barrier metal layer comprises W, TiW or Mo; and   the stress relieving layer comprises a single layer of Cu, Ni, Pt, Ti, Rh, Pd, or Cr, or a composite of layers comprising metals selected from Cu, Ni, Pt, Ti, Rh, Pd, Cr, and Au.   
     
     
         17 . The light emitting diode of  claim 4 , wherein:
 the reflective metal layer comprises any one of Ag or Ag alloys;   the barrier metal layer comprises Pt or Ni; and   the stress relieving layer comprises a single layer of Cu, Cr, Rh, Pd, TiW, or Ti, or a composite of layers comprising metals selected from Ni, Au, and Cu.   
     
     
         18 . A method of manufacturing a light emitting diode, the method comprising:
 forming a semiconductor stack on a substrate, the semiconductor stack comprising a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer;   patterning the second conductivity-type semiconductor layer and the active layer to form mesas on the first conductivity-type semiconductor layer;   forming reflective electrodes on the mesas; and   forming a current spreading layer on the mesas and the first conductivity-type semiconductor layer, the current spreading layer being electrically isolated from the mesas and comprising first openings exposing at least a portion of the reflective electrodes.   
     
     
         19 . The method of  claim 18 , wherein the forming the reflective electrodes comprises:
 forming a reflective metal layer on the second conductivity-type semiconductor layer; and   forming a barrier metal layer to cover an upper surface and a side surface of the reflective metal layer.   
     
     
         20 . The method of  claim 19 , wherein the forming the reflective electrodes further comprises forming a stress relieving layer having a coefficient of thermal expansion that is between the coefficient of thermal expansion of the reflective metal layer and the coefficient of thermal expansion of the barrier metal layer, before forming the barrier metal layer. 
     
     
         21 . The method of  claim 18 , further comprising, before forming the current spreading layer, forming a lower insulation layer between the mesas and the current spreading layer, the lower insulation layer comprising second openings exposing at least a portion of the reflective electrodes, the lower insulation layer electrically isolating the current spreading layer from the mesas and the reflective electrodes. 
     
     
         22 . The method of  claim 18 , further comprising:
 texturing a first surface of the substrate,   wherein the semiconductor stack is formed on an opposing second surface of the substrate.   
     
     
         23 . The method of  claim 22 , wherein texturing comprises grinding the substrate second surface, followed by treating the textured substrate second surface with phosphoric acid or a mixture of sulfuric acid and phosphoric acid.