US2014349472A1PendingUtilityA1

Flash memory

Assignee: UNIV NAT CHIAO TUNGPriority: Dec 1, 2011Filed: Aug 8, 2014Published: Nov 27, 2014
Est. expiryDec 1, 2031(~5.4 yrs left)· nominal 20-yr term from priority
H10D 64/693H10D 64/667H10D 64/037H10D 30/694H10D 30/0413H10D 30/69H10D 64/685H01L 29/513H01L 29/4966H01L 29/518
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Claims

Abstract

A MONOS Charge-Trapping flash (CTF), with record thinnest 3.6 nm ENT trapping layer, has a large 3.1 V 10-year extrapolated retention window at 125° C. and excellent 10 6 endurance at a fast 100 μs and ±16 V program/erase. This is achieved using As + -implanted higher κ trapping layer with deep 5.1 eV work-function of As. In contrast, the un-implanted device only has a small 10-year retention window of 1.9 V at 125° C. A MoN—[SiO 2 —LaAlO 3 ]—[Ge—HfON]—[LaAlO 3 —SiO 2 ]—Si CTF device is also provided with record-thinnest 2.5-nm Equivalent-Si 3 N 4 -Thickness (ENT) trapping layer, large 4.4 V initial memory window, 3.2 V 10-year extrapolated retention window at 125° C., and 3.6 V endurance window at 10 6 cycles, under very fast 100 μs and low ±16 V program/erase. These were achieved using Ge reaction with HfON trapping layer for better charge-trapping and retention.

Claims

exact text as granted — not AI-modified
1 - 4 . (canceled) 
     
     
         5 . A method, comprising:
 providing a substrate;   forming a first SiO 2  layer on the substrate;   forming a first high-κ layer on the first SiO 2  layer;   forming a metal-implanted oxynitride layer on the first high-κ layer;   forming a second high-κ layer on the metal-implanted oxynitride layer;   forming a second SiO 2  layer on the second high-κ layer; and   forming a gate layer on the second SiO 2  layer.   
     
     
         6 . The method of  claim 5 , wherein the high-κ layer is Al 2 O 3 , La 2 O 3 , HfO 2 , ZrO 2 , TiO 2 , SiN or ternary or quarternary combinations thereof, the oxynitride is AlON, LaON, HfON, ZrON, TiON, SiON or quarternary combinations thereof, and the implanted metal are heavy metals of As, Sb, Ga, or In. 
     
     
         7 . The method of  claim 5 , wherein the metal-implanted oxynitride is formed by implanting metal at tilted angle and <10 KeV. 
     
     
         8 . The method of  claim 5 , wherein the gate layer is made of metal or metal-nitride. 
     
     
         9 . The method of  claim 8 , wherein the metal-nitride is TiN, TaN or MoN.

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