Method of Dicing a Wafer

Abstract

A method of dicing a semiconductor wafer includes forming a layer stack on a first main surface of a substrate. The layer stack and a portion of the substrate are etched according to a pattern defining an intended dicing location to obtain a trench structure. The substrate is irradiated with a laser beam to locally modify the substrate between a bottom of the trench structure and a second main surface of the substrate opposite to the first main surface.

What is claimed is: 
     
         1 . A method of dicing a semiconductor wafer, the method comprising:
 forming a layer stack on a first main surface of a substrate;   etching the layer stack and a portion of the substrate according to a pattern defining an intended dicing location to obtain a trench structure; and   irradiating the substrate with a laser beam to locally modify the substrate between a bottom of the trench structure and a second main surface of the substrate opposite to the first main surface.   
     
     
         2 . The method of  claim 1 , wherein forming the layer stack comprises:
 forming an interconnection layer comprising a metal region at the intended dicing location; and   forming a via layer adjacent to the interconnection layer, the via layer comprising a metallic via bar at the intended dicing location contacting the metal region of the interconnection layer.   
     
     
         3 . The method of  claim 2 , wherein the metallic via bar is shaped as a slit. 
     
     
         4 . The method of  claim 2 , wherein the metal region and the metallic via bar form at least one loop to laterally enclose at least one chip region of the semiconductor wafer. 
     
     
         5 . The method of  claim 1 , further comprising:
 aligning a lithography mask defining the intended dicing location on a protective oxide/nitride layer that is a top layer of the layer stack; and   removing the protective oxide/nitride layer using a dry plasma etch or a wet chemical etch to expose a metal layer of the layer stack beneath the protective oxide/nitride layer.   
     
     
         6 . The method of  claim 1 , wherein etching the layer stack is performed using a wet etch. 
     
     
         7 . The method of  claim 6 , wherein the wet etch is based on at least one of hydrogen peroxide, sulfuric acid, and/or de-ionized water. 
     
     
         8 . The method of  claim 1 , wherein etching the substrate is performed using a dry plasma etch or a wet chemical etch. 
     
     
         9 . The method of  claim 1 , wherein irradiating the substrate with the laser beam is performed from the second main surface of the substrate. 
     
     
         10 . The method of  claim 1 , further comprising:
 aligning a laser source to the intended dicing location using an infrared camera prior to irradiating the substrate, the laser beam emanating from the laser source.   
     
     
         11 . The method of  claim 1 , wherein etching the layer stack and the portion of the substrate produces the trench structure having a width of 10 μm or less. 
     
     
         12 . The method of  claim 1 , wherein etching the portion of the substrate is performed to a depth of 1 μm or more. 
     
     
         13 . The method of  claim 1 , wherein forming the layer stack is performed during a back-end-of-line process of a semiconductor manufacturing process. 
     
     
         14 . The method of  claim 1 , further comprising:
 performing a wafer backside grinding prior to irradiating.   
     
     
         15 . The method of  claim 1 , further comprising, subsequent to irradiating the substrate:
 singulating a plurality of chip elements formed on the semiconductor wafer using an expander comprising an expandable surface on which the wafer is placed.   
     
     
         16 . The method of  claim 1 , wherein irradiating the substrate comprising focusing the laser beam at a depth within the substrate and moving the laser beam along the intended dicing location. 
     
     
         17 . The method of  claim 1 , wherein irradiating the substrate comprises focusing the laser beam successively at a plurality of depths within the substrate to obtain a distributed or enlarged modified substrate region. 
     
     
         18 . The method of  claim 1 , wherein irradiating the substrate produces a modified substrate region having a poly-crystalline morphology and/or an amorphous morphology. 
     
     
         19 . A method of dicing a semiconductor wafer, the method comprising:
 defining a continuous portion of metal or a dielectric around a chip in a layer stack on a first main surface of a substrate;   etching the continuous portion to obtain an upper portion of a trench structure;   etching the substrate at locations exposed by the upper portion of the trench structure to obtain a lower portion of the trench structure; and   irradiating the substrate with a laser beam focused at a region between the lower portion of the trench structure and a second main surface of the substrate opposite to the first main surface.   
     
     
         20 . A method of dicing a semiconductor wafer, the method comprising:
 forming a layer stack on a first main surface of a substrate, the layer stack comprising a final passivation layer and a metal region at an intended lateral dicing location;   forming a photoresist layer on the final passivation layer;   performing a photolithographic process to selectively remove the photoresist layer at a location that is substantially aligned to the metal region;   etching the final passivation layer at the location that is substantially aligned to the metal region due to the photolithographic process;   etching the metal region of the layer stack to expose the first main surface of the substrate at the intended lateral dicing location;   etching the substrate through an opening in the layer stack obtained during the etching of the metal region to obtain a trench structure in the substrate;   irradiating the substrate with a laser beam to locally modify the substrate between a bottom of the trench structure and a second main surface of the substrate opposite to the first main surface; and   singulating individual chips.