Complex Semiconductor Packages and Methods of Fabricating the Same

Abstract

Disclosed are complex semiconductor packages, each including a large power module package which includes a small semiconductor package, and methods of manufacturing the complex semiconductor packages. An exemplary complex semiconductor package includes a first package including: a first packaging substrate; a plurality of first semiconductor chips disposed on the first packaging substrate; and a first sealing member covering the first semiconductor chips on the first packaging substrate; and at least one second package separated from the first packaging substrate, disposed in the first sealing member, and including second semiconductor chips.

1 .- 20 . (canceled) 
     
     
         21 . A complex semiconductor package, comprising:
 a first package having a direct bond copper substrate, one or more first semiconductor chips disposed on the direct bond copper substrate, and a first sealing member covering the one or more first semiconductor chips and all of the direct bond copper substrate except for a bottom surface thereof which remains exposed from the package, wherein the direct bond copper substrate comprises a ceramic insulating layer, a top conductive layer disposed on an upper surface of the ceramic insulating layer, and a bottom conductive layer disposed on a lower surface of the ceramic insulating layer; and   at least one second package comprising one or more second semiconductor chips and a second sealing member covering the one or more second semiconductor chips, wherein the at least one second package is separated from the first packaging substrate, disposed in the first sealing member, and completely surrounded by the first sealing member.   
     
     
         22 . The complex semiconductor package of  claim 21 , further comprising a connecting member having a first surface and a second surface opposite the first surface, the connecting member being separated from the direct bond copper substrate and disposed in the first sealing member such the the first sealing member covers at least a portion of each said surface of the connecting member, and the second package being disposed on the connecting member. 
     
     
         23 . The complex semiconductor package of  claim 22 , wherein the first package further comprises:
 first leads that are partially exposed by the first sealing member and are electrically connected to the direct bond copper substrate; and   second leads that are partially exposed by the first sealing member and electrically connected to the connecting member.   
     
     
         24 . The complex semiconductor package of  claim 21 , wherein the second package further comprises:
 a second packaging substrate on which the one or more second semiconductor chips are disposed;   third and fourth leads electrically connected to the one or more second semiconductor chips; and   wherein the second sealing member further covers the second packaging substrate and partially covers the third and fourth leads to expose a portion of each of the third and fourth leads.   
     
     
         25 . The complex semiconductor package of  claim 24 , wherein the third lead is extended from the lower surface of the connecting member, and the one or more second semiconductor chips are disposed on the third lead and electrically connected to the third lead. 
     
     
         26 . The complex semiconductor package of  claim 24 , wherein the fourth lead is connected to the upper surface of the first sealing member, and the one or more second semiconductor ships are disposed on the fourth lead and electrically connected to the fourth lead.