Semiconductor device provided with photodiode, manufacturing method thereof, and optical disc device
Abstract
A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a second semiconductor layer ( 12 ) of a first conductivity type (P-type) between a first semiconductor layer ( 11 ) of the first conductivity type (P-type) and a cathode region ( 22 ) of a second conductivity type (N-type), said cathode region ( 22 ) touching said second semiconductor layer ( 12 ) and a surface of a semiconductor substrate; a first diffusion layer ( 19 ) of a first conductivity type (P-type) touching said second semiconductor layer ( 12 ) and said surface of the semiconductor substrate, said second semiconductor layer ( 12 ) physically separating said cathode region ( 22 ) from said first diffusion layer ( 19 ); a second diffusion layer ( 15 ) of the first conductivity type (P-type) between said first diffusion layer ( 19 ) and said second semiconductor layer ( 12 ), said second semiconductor layer ( 12 ) physically separating said first semiconductor layer ( 11 ) from said second diffusion layer ( 15 ), wherein an impurity concentration of the first conductivity type (P-type) in said second diffusion layer ( 15 ) is lower than an impurity concentration of the first conductivity type (P-type) in said first diffusion layer ( 19 ).
2 . The semiconductor device according to claim 1 , wherein said first conductivity type (P-type) is P-type.
3 . The semiconductor device according to claim 1 , wherein said second conductivity type (N-type) is N-type.
4 . The semiconductor device according to claim 1 , wherein a conductivity of the first conductivity type (P-type) is opposite to a conductivity of the second conductivity type (N-type).
5 . The semiconductor device according to claim 1 , wherein said second diffusion layer ( 15 ) touches said first diffusion layer ( 19 ) and said second semiconductor layer ( 12 ).
6 . The semiconductor device according to claim 1 , wherein said second semiconductor layer ( 12 ) touches said second diffusion layer ( 15 ) and said first semiconductor layer ( 11 ).
7 . The semiconductor device according to claim 1 , wherein said second semiconductor layer ( 12 ) is between said first semiconductor layer ( 11 ) and said second diffusion layer ( 15 ).
8 . The semiconductor device according to claim 1 , wherein said second semiconductor layer ( 12 ) is between said cathode region ( 22 ) and said first diffusion layer ( 19 ).
9 . The semiconductor device according to claim 1 , wherein an impurity concentration of the first conductivity type (P-type) in said second semiconductor layer ( 12 ) being lower than said impurity concentration of the first conductivity type (P-type) in said first diffusion layer ( 19 ).
10 . The semiconductor device according to claim 9 , wherein said impurity concentration of the first conductivity type (P-type) in said second semiconductor layer ( 12 ) is lower than an impurity concentration of the first conductivity type (P-type) in said first semiconductor layer ( 11 ).
11 . The semiconductor device according to claim 1 , wherein a side end of the cathode region ( 22 ) is physically separated along an X axis direction from a side end of the first diffusion layer ( 19 ) by a distance alpha, said X axis direction being parallel to said surface of the semiconductor substrate.
12 . The semiconductor device according to claim 11 , wherein said cathode region ( 22 ) terminates in said X axis direction at said side end of the cathode region ( 22 ).
13 . The semiconductor device according to claim 11 , wherein said first diffusion layer ( 19 ) terminates in said X axis direction at said side end of the first diffusion layer ( 19 ).
14 . The semiconductor device according to claim 11 , wherein said distance alpha is 3.0 μm to 4.0 μm.
15 . The semiconductor device according to claim 11 , wherein said side end of the first diffusion layer ( 19 ) is offset along said X axis direction from a side end of the second diffusion layer ( 15 ) by a distance beta.
16 . The semiconductor device according to claim 15 , wherein said second diffusion layer ( 15 ) terminates in said X axis direction at said side end of the second diffusion layer ( 15 ).
17 . The semiconductor device according to claim 15 , wherein said side end of the second diffusion layer ( 15 ) is separated along the X axis direction from said cathode region ( 22 ) by a sum total of the distance alpha and the distance beta.
18 . The semiconductor device according to claim 15 , wherein said distance beta is 1.0 μm to 2.0 μm.
19 . An electronic device comprising:
the semiconductor device according to claim 1 ; a processor ( 61 ) configured to electronically process an electric signal, wherein said semiconductor device is configured to receive light and to convert said light into said electric signal.
20 . The electronic device according to claim 19 , wherein said processor ( 61 ) is configured to perform an intensity detection process, said intensity detection process using said electric signal to detect an intensity of the light.
21 . The electronic device according to claim 20 , wherein said processor ( 61 ) is configured to adjust said intensity of the light after performing said intensity detection process.Join the waitlist — get patent alerts
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