Semiconductor device and method for manufacturing the same

Abstract

A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.

What is claimed is:  
     
         1 . A semiconductor device, comprising:
 a metal oxide semiconductor layer, comprising a source region and a drain region, wherein a surface of the source region and the drain region composes at least one of hydrogen group and hydroxyl group;   a first insulating layer, located on the metal oxide semiconductor layer, wherein the first insulating layer does not cover the source region and the drain region;   a gate, located on the first insulating layer;   a dielectric layer, covering the gate, the source region and the drain region of the metal oxide semiconductor layer; and   a source electrode and a drain electrode, located on the dielectric layer, and electrically connected to the source region and the drain region respectively.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the concentration of the at least one of hydrogen group and hydroxyl group in the dielectric layer is higher than 1E18 cm −3 . 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the dielectric layer comprises polyvinylpyrrolidone (PVP), polyvinyl alcohol (PVA), polyacrylates, cinnamate-based polyvinylphenols (Ci-PVP), silicon nitride (SiN X ), or SiO 2 . 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the metal oxide semiconductor layer comprises zinc oxide (ZnO) doped with indium (In), aluminum (Al), gallium (Ga), stannum (Sn), zinc (Zn) or hafnium (Hf), or Ga and In co-doped ZnO (IGZO). 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the first insulating layer comprises an intermediate layer and a barrier layer, the intermediate layer is located between the barrier layer and the metal oxide semiconductor layer, the intermediate layer comprises silicon oxide, Y 2 O 3 , Ta 2 O 5 , or HfO 2 , and the barrier layer comprises SiN X , or aluminum oxide. 
     
     
         6 . The semiconductor device according to  claim 1 , further comprising a second insulating layer, located between the gate and the first insulating layer, wherein the second insulating layer comprises silicon oxide, SiN X , silicon oxynitride, polyvinyl pyrrolidone (PVP), polyvinyl alcohol (PVA), polyacrylates, cinnamate-based polyvinylphenols (Ci-PVP), parylenes or photoacryl. 
     
     
         7 . The semiconductor device according to  claim 1 , further comprising a source top-electrode and a drain top-electrode located on the dielectric layer, wherein a storage capacitor is formed by the source top-electrode and the source region and by the drain top-electrode and the drain region. 
     
     
         8 . The semiconductor device according to  claim 1 , further comprising:
 a protection layer, covering the dielectric layer, the source electrode and the drain electrode; and   a pixel electrode, located on the protection layer, wherein the pixel electrode is electrically connected to the drain electrode.   
     
     
         9 . The semiconductor device according to  claim 8 , further comprising:
 a light-emitting material layer, located on the pixel electrode; and   an electrode film, located on the light-emitting material layer.