Compensation for a charge in a silicon substrate

Abstract

A silicon device includes an active silicon layer, a buried oxide (BOX) layer beneath the active silicon layer and a high-resistivity silicon layer beneath the BOX layer. The device also includes a harmonic suppression layer at a boundary of the BOX layer and the high-resistivity silicon layer.

1 . A silicon device, comprising:
 an active silicon layer;   a buried oxide (BOX) layer beneath the active silicon layer;   a high-resistivity silicon layer beneath the BOX layer; and   a harmonic suppression layer at a boundary of the BOX layer and the high-resistivity silicon layer.   
     
     
         2 . The silicon device of  claim 1 , wherein the high-resistivity silicon layer has a resistivity of at least 1000 Ohm-cm. 
     
     
         3 . The silicon device of  claim 1 , wherein the harmonic suppression layer comprises positively charged ions. 
     
     
         4 . The silicon device of  claim 3 , wherein the positively charged ions include boron ions. 
     
     
         5 . The silicon device of  claim 1 , wherein the harmonic suppression layer has a thickness of about 0.5 microns (μm). 
     
     
         6 . The silicon device of  claim 1 , wherein the harmonic suppression layer is located about 20 μm or less from an upper surface of the active silicon layer. 
     
     
         7 . The silicon device of  claim 1 , wherein the high-resistivity silicon layer is a p-type layer.