Semiconductor device and method of manufacturing the same

Abstract

In one embodiment, a method of manufacturing a semiconductor device includes sequentially forming a first insulator, a second insulator, and a sacrificial layer on a semiconductor substrate, and forming plural core materials from the sacrificial layer and the second insulator. The method further includes forming first and second interconnects on side surfaces of each core material to form plural first interconnects and plural second interconnects alternately, each first interconnect having a first side surface in contact with a core material and a second side surface positioned on an opposite side of the first side surface, and each second interconnect having a third side surface in contact with a core material and a fourth side surface positioned on an opposite side of the third side surface. The method further includes removing the sacrificial layer so that the second insulator remains, after the first and second interconnects are formed.

1 . A semiconductor device comprising:
 a semiconductor substrate;   a first insulator disposed on the semiconductor substrate;   a plurality of first interconnects disposed on the first insulator, each first interconnect having a first side surface, and a second side surface inclining more than the first side surface;   a plurality of second interconnects disposed on the first insulator alternately with the plurality of first interconnects, each second interconnect having a third side surface facing the first side surface, and a fourth side surface facing the second side surface and inclining more than the third side surface; and   a second insulator disposed in a first region which is between the first and third side surfaces without being disposed in a second region which is between the second and fourth side surfaces, the second insulator being disposed in a bottom portion of the first region so that the second insulator is partially in contact with the first and third side surfaces.   
     
     
         2 . The device of  claim 1 , further comprising a third insulator disposed on the first and second interconnects to include air gaps in the first and second regions. 
     
     
         3 . The device of  claim 2 , further comprising a protection layer disposed between the second and third insulators, the protection layer being disposed on the first to fourth surfaces of the first and second interconnects. 
     
     
         4 . The device of  claim 1 , wherein
 each first interconnect comprises a first barrier metal layer exposed to the first side surface and a bottom surface of the first interconnect, and a first interconnect material disposed on the first barrier metal layer, and   each second interconnect comprises a second barrier metal layer exposed to the third side surface and a bottom surface of the second interconnect, and a second interconnect material disposed on the second barrier metal layer.   
     
     
         5 . The device of  claim 1 , wherein a height of the first and second interconnects is twice to ten times widths of the first and second interconnects. 
     
     
         6 . The device of  claim 1 , wherein a thickness of the second insulator is 0.2 to 0.5 times a height of the first and second interconnects. 
     
     
         7 . The device of  claim 1 , wherein a width of the second insulator is larger or smaller than a distance between the first and third side surfaces above the second insulator. 
     
     
         8 . The device of  claim 7 , wherein the width of the second insulator and the distance between the first and third side surfaces suffice 0.5D≦W<D or D<W≦2D where W and D denote the width of the second insulator and the distance between the first and third side surfaces, respectively. 
     
     
         9 . The device of  claim 7 , wherein the second insulator has taper shaped side surfaces.