Printed circuit board and manufacturing method thereof, and semiconductor package including the printed circuit board

Abstract

A printed circuit board, a manufacturing method thereof, and a semiconductor package including the printed circuit board. The printed circuit board includes a base substrate including a plurality of circuit patterns, a cavity formed above the base substrate, a pad embedded in the base substrate and being exposed through the substrate bottom surface of the cavity, and an electronic component mounted in the cavity and electrically connected to the pad. A cavity having a predetermined depth is formed in a base substrate of a printed circuit board so as to mount an electronic component therein, such that a gap between an upper semiconductor package and a lower semiconductor package may be obtained even if pitches between the balls are decreased for high density and high performance of the upper semiconductor package in the manufacturing of a semiconductor package having a PoP structure.

What is claimed is: 
     
         1 . A printed circuit board, comprising:
 a base substrate including a plurality of circuit patterns;   a cavity formed above the base substrate;   pads embedded in the base substrate and being exposed through the substrate bottom surface of the cavity; and   an electronic component mounted in the cavity and electrically connected to the pads.   
     
     
         2 . The printed circuit board according to  claim 1 , wherein the top surface of the pads and the bottom surface of the cavity are in the same plane. 
     
     
         3 . The printed circuit board according to  claim 1 , wherein an alignment pattern for forming the cavity is formed at a lower portion of a sidewall of the cavity 
     
     
         4 . The printed circuit board according to  claim 1 , wherein the electronic component includes external terminals and is mounted in a face-down position in which the external terminals face the pads. 
     
     
         5 . The printed circuit board according to  claim 1 , further comprising a via formed in the base substrate and electrically connecting the circuit patterns to each other and the circuit patterns to the pads. 
     
     
         6 . A manufacturing method of a printed circuit board, the method comprising:
 forming a first protective layer for protecting circuits on a predetermined region of an upper surface of a base substrate;   forming insulating layers on the upper surface of the base substrate on which the first protective layer is formed, and on a lower surface of the base substrate;   forming vias in the upper insulating layer and in the lower insulating layer and then forming circuits on an upper surface of the upper insulating layer and a lower surface of the lower insulating layer;   forming second protective layers for protecting circuits gaps between the circuit patterns formed on the surfaces of the upper and lower insulating layers; and   forming a cavity for mounting the electronic component in the upper insulating layer at a position corresponding to the first protective layer.   
     
     
         7 . The method according to  claim 6 , wherein the base substrate has circuits formed on the upper surface, the lower surface and an inside thereof, and has a via connecting the circuits on the upper surface and on the lower surface to each other. 
     
     
         8 . The method according to  claim 6 , wherein, in the forming of the cavity, the first protective layer embedded in the upper insulating layer is removed so that the top surfaces of the circuit patterns exposed through the bottom surface of the cavity and the bottom surface are in the same plane with no difference in level. 
     
     
         9 . The method according to  claim 6 , wherein, in the forming of the cavity, a part of the first protective layer remains at a lower portion of a sidewall of the cavity. 
     
     
         10 . A semiconductor package having a PoP structure of which an upper semiconductor package is stacked on an lower semiconductor package, the lower semiconductor package comprising:
 a printed circuit board having a cavity of a predetermined size formed at a predetermined region of its upper surface; and   an electronic component mounted in the cavity,   wherein the printed circuit board includes:
 a base substrate including a plurality of circuit patterns; 
 a cavity formed above the base substrate; and 
 pads embedded in the base substrate and being exposed through the substrate bottom surface of the cavity. 
   
     
     
         11 . The semiconductor package according to  claim 10 , wherein the top surface of the pads and the bottom surface of the cavity are in the same plane. 
     
     
         12 . The semiconductor package according to  claim 10 , wherein an alignment pattern for forming the cavity is formed at a lower portion of a sidewall of the cavity. 
     
     
         13 . The semiconductor package according to  claim 10 , wherein the electronic component includes external terminals and is mounted in a face-down position in which the external terminals face the pads. 
     
     
         14 . The semiconductor package according to  claim 10 , further comprising a via formed in the base substrate and electrically connecting the circuit patterns to each other and the circuit patterns to the pads.