Semiconductor sensor reliability operation
Abstract
Embodiments of the present invention provide a semiconductor sensor reliability system and method. Specifically, the present invention provides in-situ positioning of a reliability sensor (hereinafter sensors) within each functional block, as well as at critical locations, of a semiconductor system. The quantity and location of the sensors are optimized to have maximum sensitivity to known process variations. In general, the sensor models a behavior (e.g., aging process) of the location (e.g., functional block) in which it is positioned and comprises a plurality of stages connected as a network and a self-digitizer. Each sensor has a mode selection input for selecting a mode thereof and an operational trigger input for enabling the sensor to model the behavior. The model selection input and operation trigger enable the sensor to have an operational mode in which the plurality of sensors are subject to an aging process, as well as a measurement mode in which an age of the plurality of sensors is outputted. Based on the output, one or more functional blocks are modified by a control sensor component to reduce semiconductor system degredation in real-time.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A system for semiconductor sensor reliability operation comprising:
at least one processing unit; memory operably associated with the at least one processing unit; and a reliability sensor component storable in memory and executable by the at least one processing unit, the reliability sensor component configured to:
receive an output from a plurality of sensors positioned on a plurality of functional blocks of a semiconductor system, wherein each of the plurality of functional blocks has at least one sensor, and wherein the output models an aging process of the location in which it is positioned; and
modify at least one of the following: at least one of the plurality of sensors, at least one of the plurality of functional blocks, and the semiconductor system.
2 . The semiconductor sensor reliability system of claim 1 , wherein the at least one sensor is positioned at a location within the functional block subject to semiconductor system manufacturing process variation.
3 . The semiconductor sensor reliability system of claim 1 , wherein at least one of the plurality of sensors is positioned at a connection point between functional blocks.
4 . The semiconductor sensor reliability system of claim 1 , each of the plurality of sensors having a mode selection input for selecting a mode of the plurality of sensors and an operational trigger input for enabling the plurality of sensors to model the aging process.
5 . The semiconductor sensor reliability system of claim 4 , the mode selection input enabling the plurality of sensors to have:
an operational mode in which the plurality of sensors are subject to the aging process; and a measurement mode in which an age of the plurality of sensors are outputted.
6 . The semiconductor sensor reliability system of claim 1 , each of the plurality of sensors comprising a plurality of sensor stages connected as a network and a self digitizer.
7 . The semiconductor sensor reliability system of claim 6 , each of the plurality of sensor stages comprising a plurality of devices being selected from a group consisting of: aging-resistant devices and aging-sensitive devices.
8 . A method for semiconductor reliability sensor operation, comprising:
positioning a plurality of sensors on a plurality of functional blocks to observe defect-sensitive locations within a semiconductor system, wherein each of the plurality of functional blocks has at least one sensor; and engaging an operational model of the plurality of the sensors to cause each sensor to ouput a model representing an aging process of the defect-senstive location in which it is positioned; and modifying at least one of the following based on the outputted model: at least one of the plurality of sensors, at least one of the plurality of functional blocks, and the semiconductor system.
9 . The method of claim 8 , wherein the defect-senstive location comprises at least one of the following: a location within the functional block subject to semiconductor system manufacturing process variation, and a connection point between functional blocks.
10 . The method of claim 8 , further comprising receiving output from the plurality of sensors, the output comprising a sensor age of each of the plurality of sensors due to the aging process.
11 . The method of claim 8 , each sensor comprising a plurality of sensor stages connected as a network and a self digitizer, each of the plurality of stages having multiple inputs and multiple outputs.
12 . The method of claim 11 , each of the plurality of stages comprising a plurality of devices coupled in a Complimentary Metal-Oxide Semiconductor (CMOS)-like fashion.
13 . The method of claim 12 , the plurality of devices being selected from a group consisting of: aging-resistant devices and aging-sensitive devices.Join the waitlist — get patent alerts
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