Linearity in passive mixer circuits

Abstract

A circuit used in a mixer configured to receive a signal made up of a relatively small modulation signal and a relatively large carrier signal is described. The mixer includes multiple switches. A balancing circuit configured to receive a supply voltage and a clocking signal is provided, and the balancing circuit provides a control signal to a switch in the mixer. The balancing circuit includes a capacitor configured to receive and selectively dissipate charge as a gate voltage along a gate path. The control signal causes switching of the switch in the mixer at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage, wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch.

What is claimed is: 
     
         1 . A wireless receiver comprising:
 a mixer configured to receive an input radio frequency (RF) signal; and   a balancing circuit configured to receive a clocking signal and provide a control signal to a switch in the mixer, the balancing circuit configured to control switching of the switch in the mixer based on the clocking signal and a voltage difference value between a source voltage and a gate voltage to control saturation;   wherein the switch in the mixer is isolated from the balancing circuit using a capacitor arrangement.   
     
     
         2 . The wireless receiver of  claim 1 , wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the switch. 
     
     
         3 . The wireless receiver of  claim 1 , wherein the balancing circuit further comprises a cross-coupled voltage mixing circuit configured to mix the clocking signal with an inverse of the clocking signal to produce a third clocking signal controlling a transistor interfacing with a capacitor in the balancing circuit. 
     
     
         4 . The wireless receiver of  claim 3 , further comprising an NMOS/PMOS transistor pair connected to the capacitor and configured to receive the clocking signal and a supply voltage and control charging of the capacitor. 
     
     
         5 . The wireless receiver of  claim 3 , wherein the capacitor is sized to adequately supply the gate charge voltage and all parasitic capacitances in a gate path. 
     
     
         6 . The wireless receiver of  claim 1 , wherein the predetermined voltage value is a supply voltage. 
     
     
         7 . A method for mixing a received radio frequency (RF) signal with a Local Oscillator (LO) signal, comprising:
 receiving a clocking signal; and   switching one of the RF signal and the LO signal using a mixing switch at times in accordance with the clocking signal according to a voltage difference value between a source voltage and a gate voltage to control circuit saturation using a capacitor arrangement.   
     
     
         8 . The method of  claim 7 , wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the mixing switch. 
     
     
         9 . The method of  claim 7 , further comprising mixing the clocking signal with an inverse of the clocking signal to produce a third clocking signal controlling a transistor interfacing with the capacitor. 
     
     
         10 . The method of  claim 7 , further comprising controlling charge of a capacitor using an NMOS/PMOS transistor pair connected to the capacitor and configured to receive the clocking signal and a supply voltage. 
     
     
         11 . The method of  claim 10 , wherein the capacitor is sized to adequately supply the gate charge voltage and all parasitic capacitances in a gate path. 
     
     
         12 . The method of  claim 7 , wherein the predetermined voltage value is a supply voltage. 
     
     
         13 . An apparatus for mixing a received radio frequency (RF) signal with a Local Oscillator (LO) signal, comprising:
 means for receiving a clocking signal;   means for switching one of the RF signal and the LO signal using a mixing switch at times in accordance with the clocking signal according to a voltage difference value between a source voltage and a gate voltage to control saturation using a capacitor arrangement.   
     
     
         14 . The apparatus of  claim 13 , wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the mixing switch. 
     
     
         15 . The apparatus of  claim 13 , further comprising means for mixing the clocking signal with an inverse of the clocking signal to produce a third clocking signal controlling a transistor interfacing with the capacitive means. 
     
     
         16 . The apparatus of  claim 13 , further comprising means for controlling charge of a capacitor, said means for controlling comprising an NMOS/PMOS transistor pair configured to receive the clocking signal and a supply voltage. 
     
     
         17 . The apparatus of  claim 16 , wherein the capacitor is sized to adequately supply the gate charge voltage and all parasitic capacitances in a gate path. 
     
     
         18 . The apparatus of  claim 13 , wherein the predetermined voltage value is a supply voltage. 
     
     
         19 . A non-transitory computer readable medium with an executable program stored thereon, wherein the program instructs a computing device to perform a method for mixing a received radio frequency (RF) signal with a Local Oscillator (LO) signal, the method comprising:
 receiving a clocking signal; and   switching one of the RF signal and the LO signal using a mixing switch at times in accordance with the clocking signal according to a voltage difference value between a source voltage and the gate voltage to control saturation using a capacitor arrangement.   
     
     
         20 . The non-transitory computer readable medium of  claim 19 , wherein the voltage difference value between the source voltage and the gate voltage is approximately a predetermined voltage value greater than a turn on voltage level of the mixing switch.