In-Situ Nitride Initiation Layer For RRAM Metal Oxide Switching Material

Abstract

A resistive memory device having an in-situ nitride initiation layer is disclosed. The nitride initiation layer is formed above the first electrode, and the metal oxide switching layer is formed above the nitride initiation layer to prevent oxidation of the first electrode. The nitride initiation layer may be a metal nitride layer that is formed by atomic layer deposition in the same chamber in which the metal oxide switching layer is formed. The nitride initiation layer and metal oxide switching layer may alternatively be formed in a chemical vapor deposition (CVD) chamber or a physical vapor deposition (PVD) chamber.

What is claimed is: 
     
         1 . A resistive memory device comprising:
 a first electrode;   a first layer disposed on the first electrode;   a second layer disposed on the first layer; and   a second electrode disposed above the second layer;   wherein the first layer comprises a nitride;   wherein the second layer comprises an oxide; and   wherein the first electrode and the second layer directly contact the first layer.   
     
     
         2 . The resistive memory device of  claim 1 , wherein a thickness of the first layer is between about 5 Angstroms and about 10 Angstroms. 
     
     
         3 . The resistive memory device of  claim 1 , wherein a thickness of the first layer is less than 5 Angstroms. 
     
     
         4 . The resistive memory device of  claim 1 , wherein the nitride of the first layer comprises a metal. 
     
     
         5 . The resistive memory device of  claim 1 , wherein the nitride of the first layer and the oxide of the second layer comprise a common metal. 
     
     
         6 . The resistive memory device of  claim 5 , wherein the common metal comprises one of titanium (Ti), tungsten (W), tantalum (Ta), cobalt (Co), molybdenum (Mo), nickel (Ni), vanadium (V), hafnium (Hf) aluminum (Al), copper (Cu), platinum (Pt), palladium (Pd), iridium (Ir), ruthenium (Ru), an alloy thereof, or a combination thereof 
     
     
         7 . The resistive memory device of  claim 5 , wherein the common metal comprises one of titanium (Ti), tungsten (W), tantalum (Ta), nickel (Ni), hafnium (Hf), or aluminum (Al). 
     
     
         8 . The resistive memory device of  claim 5 , wherein the common metal comprises hafnium (Hf). 
     
     
         9 . The resistive memory device of  claim 1 , wherein the nitride of the first layer, the oxide of the second layer, the first electrode, and the second electrode comprise a common metal. 
     
     
         11 . The resistive memory device of  claim 1 , wherein the first electrode comprises a first conductive layer and a second conductive layer;
 wherein the first conductive layer interconnects the resistive memory device with another resistive memory device; and   wherein the second conductive layer interfaces the first layer and has a work function selected to provide a desired electrical interface with an adjacent component.   
     
     
         12 . The resistive memory device of  claim 1 , wherein the first electrode comprises one of p-type polysilicon, n-type polysilicon, a transition metal, a transition metal alloy, a transition metal nitride, or a transition metal carbide. 
     
     
         13 . The resistive memory device of  claim 1 , wherein the first electrode has a thickness of between about 50 Angstroms and 5000 Angstroms. 
     
     
         14 . The resistive memory device of  claim 1 , wherein the second layer has a thickness of between about 10 Angstroms and 100 Angstroms. 
     
     
         15 . The resistive memory device of  claim 1 , wherein the second layer has a thickness of between about 30 Angstroms and 50 Angstroms. 
     
     
         16 . The resistive memory device of  claim 1 , wherein the first layer protects the first electrode from oxidation. 
     
     
         17 . The resistive memory device of  claim 1 , further comprising a current steering device connected in series with the first layer and the second layer. 
     
     
         18 . The resistive memory device of  claim 17 , wherein the current steering device comprises one of a p-n junction diode, a p-i-n diode, or a transistor. 
     
     
         19 . The resistive memory device of  claim 1 , wherein the first electrode and the second electrode comprise a same material. 
     
     
         20 . The resistive memory device of  claim 1 , wherein the second electrode directly contacts the second layer.