Fluorine Passivation in CMOS Image Sensors

Abstract

CMOS imaging sensors having fluorine-passivated structures to reduce dark current are disclosed together with methods of making thereof. The CIS comprises an array of pixels on a substrate, each pixel comprising a pinned photodiode, an isolation trench adjacent to the pinned photodiode, and a plurality of transistors. Methods of preparing a CIS comprise providing a source of fluorine (F) atoms, and annealing in the presence of the source of F atoms. After the annealing, at least one silicon-containing surface or region in the CIS comprises Si—F bonds and is fluorine passivated.

What is claimed is: 
     
         1 . A method of fluorine passivating a CMOS imaging sensor (CIS), the method comprising
 forming an array of pixels on a substrate, each pixel comprising a pinned photodiode, an isolation trench adjacent to the pinned photodiode, and a plurality of transistors, and   annealing the CIS in the presence of a source of fluorine (F) atoms.   
     
     
         2 . The method of  claim 1 , wherein the source of F atoms is a fluorine-containing gas in the annealing atmosphere. 
     
     
         3 . The method of  claim 2 , wherein the fluorine-containing gas is at least one of F 2 , NF 3 , CF 4 , or a fluoride of xenon. 
     
     
         4 . The method of  claim 1 , further comprising depositing an SiO 2  layer by chemical vapor deposition (CVD),
 wherein the CVD atmosphere comprises a fluoride of xenon, and   wherein the source of F atoms comprises the SiO 2  layer.   
     
     
         5 . The method of  claim 4 , wherein the depositing is performed in the isolation trench. 
     
     
         6 . The method of  claim 1 , further comprising depositing a layer of fluorinated silicate glass (FSG) on an area of the CIS, wherein the source of F atoms comprises the layer of FSG. 
     
     
         7 . The method of  claim 1 , further comprising depositing polycrystalline silicon doped with BF 3  in the isolation trench, wherein the source of F atoms comprises the doped polycrystalline silicon. 
     
     
         8 . The method of  claim 1 , further comprising forming a WSi x :F layer in at least one of the plurality of transistors, wherein the source of F atoms comprises the WSi x :F layer. 
     
     
         9 . A fluorine-passivated CIS made by the method of  claim 1 . 
     
     
         10 . A CIS comprising an array of pixels, each pixel comprising a pinned photodiode, an isolation trench, and a plurality of transistors, wherein at least one of the pinned photodiode, isolation trench, or one of the plurality of transistors comprises fluorine. 
     
     
         11 . The CIS of  claim 10 , wherein the pinned photodiode comprises fluorine in an amount sufficient to passivate a space charge region in the pinned photodiode. 
     
     
         12 . The CIS of  claim 10 , wherein the pinned photodiode comprises fluorine in an amount sufficient to passivate a surface of the pinned photodiode. 
     
     
         13 . The CIS of  claim 10 , wherein a layer on a sidewall of the isolation trench comprises fluorine in an amount sufficient to passivate a surface of the layer. 
     
     
         14 . The CIS of  claim 10 , wherein one or more of the plurality of transistors comprises an interfacial layer, the interfacial layer comprising fluorine in an amount sufficient to passivate a surface of the interfacial layer. 
     
     
         15 . The CIS of  claim 14 , wherein the interfacial layer is adjacent to a gate dielectric. 
     
     
         16 . The CIS of  claim 10 , wherein the CIS comprises fluorine in an amount sufficient to reduce the dark current of a pixel of the CIS relative to the dark current in a substantially identical pixel without fluorine. 
     
     
         17 . The CIS of  claim 10 , wherein the fluorine passivates a silicon-containing surface or region by forming Si—F bonds.