US2014248767A1PendingUtilityA1

Methods Of Fabricating Integrated Circuitry

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Assignee: MICRON TECHNOLOGY INCPriority: Mar 1, 2013Filed: Mar 1, 2013Published: Sep 4, 2014
Est. expiryMar 1, 2033(~6.6 yrs left)· nominal 20-yr term from priority
Inventors:Zailong Bian
H10P 14/432H10W 20/425H10W 20/056H10W 20/42H10W 20/037H10W 20/43H01L 21/76877
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Claims

Abstract

A method of fabricating integrated circuitry includes forming a first conductive line. First elemental tungsten is deposited directly against an elevationally outer surface of the first conductive line selectively relative to any exposed non-conductive material. Dielectric material is formed elevationally over the first conductive line and a via is formed there-through to conductive material of the first conductive line at a location where the first tungsten was deposited. Second elemental tungsten is non-selectively deposited to within the via and electrically couples to the first conductive line. A second conductive line is formed elevationally outward of and electrically coupled to the second tungsten that is within the via.

Claims

exact text as granted — not AI-modified
1 . A method of fabricating integrated circuitry, comprising:
 forming a first conductive line;   depositing first elemental tungsten directly against an elevationally outer surface of the first conductive line selectively relative to any exposed non-conductive material;   forming dielectric material elevationally over the first conductive line and forming a via there-through to conductive material of the first conductive line at a location where the first tungsten was deposited;   non-selectively depositing second elemental tungsten to within the via and which electrically couples to the first conductive line; and   forming a second conductive line elevationally outward of and electrically coupled to the second tungsten that is within the via.   
     
     
         2 . The method of  claim 1  wherein at least a majority of the first conductive line is elemental copper. 
     
     
         3 . The method of  claim 1  wherein the second elemental tungsten is deposited at a deposition rate of about 1:1 within the via versus laterally outward of the via. 
     
     
         4 . The method of  claim 1  wherein the fabricating is relative to a substrate, and comprising providing exposed non-conductive material on the substrate during the selective depositing. 
     
     
         5 . The method of  claim 4  wherein no tungsten deposits on the exposed non-conductive material during the selective depositing. 
     
     
         6 . The method of  claim 5  wherein the second elemental tungsten is deposited at a deposition rate of about 1:1 within the via versus laterally outward of the via. 
     
     
         7 . The method of  claim 1  wherein the first tungsten is deposited to a total elevational thickness from about 50 Angstroms to about 500 Angstroms. 
     
     
         8 . The method of  claim 1  wherein the second tungsten is not deposited directly against the first tungsten. 
     
     
         9 . The method of  claim 1  comprising forming a conductive material liner within the via over sidewalls of the via and elevationally over the first tungsten before the non-selectively depositing of the second tungsten. 
     
     
         10 . The method of  claim 9  comprising forming the conductive material liner to comprise TiN. 
     
     
         11 . The method of  claim 10  comprising forming the TiN by at least one of chemical vapor deposition and atomic layer deposition. 
     
     
         12 . The method of  claim 9  comprising forming the conductive material liner to comprise WN. 
     
     
         13 . The method of  claim 12  comprising forming the WN by at least one of chemical vapor deposition and atomic layer deposition. 
     
     
         14 . The method of  claim 9  comprising forming the conductive material liner to comprise physical vapor deposited elemental tungsten. 
     
     
         15 . The method of  claim 1  wherein at least a majority of the first conductive line is elemental copper, the method being devoid of depositing elemental titanium directly against elemental copper of the first conductive line. 
     
     
         16 . The method of  claim 1  wherein the selectively depositing is by chemical vapor deposition within a deposition chamber, gaseous WF 6  and SiH 4  comprising deposition precursors fed to the chamber during said selectively depositing. 
     
     
         17 . The method of  claim 16  wherein the fabricating is relative to a substrate, and comprising substrate temperature from about 250° C. to about 350° C., chamber pressure from about 1 mTorr to about 100 mTorr, WF 6  flow rate to the chamber from about 10 sccm to about 1,000 sccm, and SiH 4  flow rate to the chamber from about 5 sccm to about 50 sccm during said selectively depositing. 
     
     
         18 . The method of  claim 1  wherein the selectively depositing is by chemical vapor deposition within a deposition chamber, gaseous WF 6  and H 2  comprising deposition precursors fed to the chamber during said selectively depositing. 
     
     
         19 . The method of  claim 18  wherein the fabricating is relative to a substrate, and comprising substrate temperature from about 250° C. to about 350° C., chamber pressure from about 1 mTorr to about 100 mTorr, WF 6  flow rate to the chamber from about 10 sccm to about 1,000 sccm, and H 2  flow rate to the chamber from about 5 sccm to about 50 sccm during said selectively depositing. 
     
     
         20 . The method of  claim 1  wherein the fabricating is relative to a substrate, and wherein the non-selective depositing is by chemical vapor deposition within a deposition chamber; gaseous WF 6  and H 2  comprising deposition precursors fed to the chamber during said non-selectively depositing; substrate temperature from about 300° C. to about 450° C., chamber pressure from about 20 Torr to about 250 Torr, WF 6  flow rate to the chamber from about 100 sccm to about 500 sccm, and H 2  flow rate to the chamber from about 1,000 sccm to about 30,000 sccm during said non-selectively depositing. 
     
     
         21 . A method of fabricating integrated circuitry, comprising:
 forming a first conductive line having an elevationally outermost surface comprising copper;   providing exposed non-conductive material laterally of the first conductive line;   depositing first elemental tungsten directly against the copper-comprising surface along at least a majority of longitudinal length of the first conductive line, the first tungsten being deposited selectively to the first conductive line relative to the exposed non-conductive material;   forming dielectric material elevationally over and directly against the first tungsten and forming a via through the dielectric material to the first tungsten;   forming a conductive material directly against the first tungsten after forming the via;   non-selectively depositing second elemental tungsten to within the via directly against the conductive material; and   forming a second conductive line elevationally outward of and electrically coupled to the second tungsten that is within the via.   
     
     
         22 . The method of  claim 21  wherein the conductive material is formed by chemical vapor deposition of at least one of TiN and WN. 
     
     
         23 . The method of  claim 22  wherein the conductive material consists essentially of at least one of TiN and WN. 
     
     
         24 . The method of  claim 21  wherein the conductive material is formed by physical vapor deposition of elemental tungsten. 
     
     
         25 . The method of  claim 24  wherein the conductive material consists essentially of said physical vapor deposited elemental tungsten. 
     
     
         26 . A method of fabricating integrated circuitry, comprising:
 forming a first conductive line having a planar elevationally outermost surface at least a majority of which comprises elemental copper;   providing non-conductive material laterally of the first conductive line, the non-conductive material having a planar elevationally outermost surface that is coplanar with the planar outermost surface of the first conductive line;   depositing first elemental tungsten directly against the copper-comprising surface along at least a majority of longitudinal length of the first conductive line, the first tungsten being deposited selectively to the first conductive line relative to the coplanar outermost surface of the non-conductive material;   forming dielectric material elevationally over and directly against the first tungsten and the non-conductive material;   forming a via through the dielectric material to the first tungsten;   forming a conductive material liner within the via over sidewalls of the via, within the via directly against the first tungsten, and elevationally over the dielectric material;   non-selectively depositing second elemental tungsten to within the via directly against the conductive material liner and elevationally over that portion of the conductive material liner that is elevationally over the dielectric material; and   forming a second conductive line elevationally outward of and electrically coupled to the second tungsten that is within the via.   
     
     
         27 . The method of  claim 26  wherein forming the second conductive line comprises:
 removing the second tungsten and the conductive material liner back at least to expose the dielectric material; and 
 depositing conductive metal material directly against the second tungsten and the liner after said removing.

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