Semiconductor device and method for manufacturing the same

Abstract

According to one embodiment, a semiconductor device includes a substrate and a stacked body on the substrate via a joining metal layer. The stacked body includes a device portion and a peripheral portion. The device portion includes from a bottommost layer to a topmost layer included in the stacked body. The peripheral portion surrounding and provided around the device portion; the peripheral portion is a portion of the bottommost layer to the topmost layer included in the stacked body and includes a portion of a semiconductor layer in contact with the joining metal layer.

What is claimed is: 
     
         1 . A method for manufacturing a semiconductor device having a stacked body connected to a substrate via a joining metal layer, comprising the processes of:
 joining the stacked body formed on a growth substrate and the substrate via the joining metal layer;   removing the growth substrate; and   forming an device portion including from an bottommost layer to an topmost layer of the stacked body and a peripheral portion surrounding and provided around the device portion by selectively etching the stacked body, the peripheral portion being a portion of the bottommost layer to the topmost layer of the stacked body and including a portion of a semiconductor layer in contact with the joining metal layer.   
     
     
         2 . The method according to  claim 1 , wherein the growth substrate is GaAs and the stacked body includes an InGaAlP semiconductor. 
     
     
         3 . The method according to  claim 2 , wherein the stacked body includes, from the topmost layer, a current diffusion layer, an n-type clad layer, a light emitting layer, a p-type clad layer, and a p-type contact layer. 
     
     
         4 . The method according to  claim 3 , wherein the semiconductor layer in contact with the joining metal layer is the p-type contact layer. 
     
     
         5 . The method according to  claim 1 , wherein the joining metal layer includes gold (Au). 
     
     
         6 . The method according to  claim 1 , wherein the substrate is conductive. 
     
     
         7 . The method according to  claim 1 , further comprising a process of removing a portion of the bottommost layer to the topmost layer remaining on the peripheral portion of a chip, the chip including the device portion separated by cutting the peripheral portion.