Circuit device and electronic apparatus

Abstract

An electronic circuit includes a noise source and an analog circuit and a logic circuit that may be adversely affected by noise. At least a portion of the analog circuit and the logic circuit is formed on a buried impurity layer whose conductivity is different from that of a substrate, and at least a portion of the periphery of that portion is surrounded by an impurity layer that is different from the substrate. Thus, propagation of the noise from the noise source is prevented.

What is claimed is: 
     
         1 . A circuit device comprising:
 a first circuit constituted by a transistor that has a DMOS structure and is formed on a first N-type buried layer on a P-type substrate; and   a second circuit constituted by a transistor that has a CMOS structure and is formed on a second N-type buried layer isolated from the first N-type buried layer.   
     
     
         2 . The circuit device according to  claim 1 ,
 wherein a region of the second circuit is surrounded by an N-type plug region that sets a potential of the second N-type buried layer.   
     
     
         3 . The circuit device according to  claim 1 ,
 wherein the transistor having the CMOS structure is formed on a P-type layer that is formed on the second N-type buried layer.   
     
     
         4 . The circuit device according to  claim 3 ,
 wherein the P-type layer is a P-type buried layer.   
     
     
         5 . The circuit device according to  claim 3 , further comprising:
 a pad through which a potential of the P-type substrate is supplied;   a first interconnect for supplying a potential from the pad to the P-type layer; and   a second interconnect for supplying a potential from the pad to the P-type substrate.   
     
     
         6 . The circuit device according to  claim 3 ,
 wherein a P-type transistor of the transistor having the CMOS structure is constituted by an N-type well formed on the P-type layer, a P-type source region formed on the N-type well, and a P-type drain region formed on the N-type well, and   an N-type transistor of the transistor having the CMOS structure is constituted by a P-type well formed on the P-type layer, an N-type source region formed on the P-type well, and an N-type drain region formed on the P-type well.   
     
     
         7 . The circuit device according to  claim 1 ,
 wherein an N-type transistor of the transistor having the CMOS structure has:   a deep N-type well formed on the first N-type buried layer;   a P-type layer formed on the deep N-type well;   an N-type source region formed on the P-type layer; and   an N-type drain region formed on the deep N-type well.   
     
     
         8 . The circuit device according to  claim 1 ,
 wherein a P-type transistor of the transistor having the DMOS structure has:   a deep N-type well formed on the first N-type buried layer;   a P-type layer formed on the deep N-type well;   a P-type source region formed on the deep N-type well; and   a P-type drain region formed on the P-type layer.   
     
     
         9 . The circuit device according to  claims 1 ,
 wherein the first circuit has a bridge circuit that outputs a chopping current for driving a motor, and   the second circuit has a detection circuit that detects a current flowing to the bridge circuit.   
     
     
         10 . The circuit device according to  claim 9 ,
 wherein the detection circuit has:   a reference voltage generation circuit that generates a reference voltage;   a voltage detection circuit that compares a voltage based on the current with the reference voltage; and   a control circuit that controls the bridge circuit based on a comparison result of the voltage detection circuit.   
     
     
         11 . The circuit device according to  claim 1 ,
 wherein the second circuit has a circuit that controls the first circuit or a circuit that detects a voltage or a current of the first circuit.   
     
     
         12 . The circuit device according to  claim 1 ,
 wherein the first circuit is a circuit that performs an operation of repeatedly switching an output current or an output voltage.   
     
     
         13 . An electronic apparatus comprising the circuit device according to  claims 1 .