Solid-state imaging device and electronic apparatus

Abstract

Solid-state imaging devices and electronic apparatuses are provided. More particularly, a solid-state imaging device that includes first and second substrates are provided. The first and second substrates are stacked on top of one another. The first substrate includes a pixel array and a peripheral circuit. The second substrate also includes a peripheral circuit. The device can be configured such that all resistors are formed in the second substrate, with no resistors being formed in the first substrate. Alternatively, the device can be configured such that all capacitors are formed in the second substrate, with no capacitors being formed in the first substrate. As yet another alternative, the second substrate can be configured such that it contains all resistors and capacitors of the peripheral circuits, with no resistors or capacitors being formed in the peripheral circuit of the first substrate.

What is claimed is: 
     
         1 . A solid-state imaging device, comprising:
 a first substrate, the first substrate including:
 a pixel array unit; 
 a peripheral circuit; 
   a second substrate, wherein the second substrate is stacked on the first substrate, the second substrate including:
 a peripheral circuit, wherein the peripheral circuit of the second substrate includes at least one of a resistance element or a capacitance element,
 wherein one of:
 the peripheral circuit of the second substrate includes a resistance element and the peripheral circuit of the first substrate does not include a resistance element, and 
 the peripheral circuit of the second substrate includes a capacitance element and the peripheral circuit of the first substrate does not include a capacitance element, and 
 the peripheral circuit of the second substrate includes both a resistance element and a capacitance element, and wherein the peripheral circuit of the first substrate includes neither a resistance element nor a capacitance element. 
 
 
   
     
     
         2 . The solid-state imaging device of  claim 1 , wherein the peripheral circuit of the second substrate includes a resistance element, and wherein the peripheral circuit of the first substrate does not include a resistance element. 
     
     
         3 . The solid-state imaging device of  claim 2 , wherein the peripheral circuit of the first substrate further includes a comparator. 
     
     
         4 . The solid-state imaging device of  claim 3 , wherein the peripheral circuit of the first substrate further includes a vertical decoder and a vertical drive circuit. 
     
     
         5 . The solid-state imaging device of  claim 2 , wherein the first substrate does not include a capacitance element. 
     
     
         6 . The solid-state imaging device of  claim 1 , wherein the peripheral circuit of the second substrate includes a capacitance element, and wherein the peripheral circuit of the first substrate does not include a capacitance element. 
     
     
         7 . The solid-state imaging device of  claim 6 , wherein the peripheral circuit of the first substrate further includes a reference signal supply unit and a bias generation circuit. 
     
     
         8 . The solid-state imaging device of  claim 7 , wherein the peripheral circuit of the first substrate further includes a vertical decoder and a vertical drive circuit. 
     
     
         9 . The solid-state imaging device of  claim 8 , wherein the peripheral circuit of the second substrate further includes a timing control circuit, a comparator, a counter circuit, a horizontal scan circuit, and pixel signal processing unit, an output IF, and a negative electric potential generation circuit. 
     
     
         10 . The solid-state imaging device of  claim 6 , wherein the first substrate does not include a resistance element. 
     
     
         11 . The solid-state imaging device of  claim 1 , wherein the peripheral circuit of the second substrate includes both a resistance element and a capacitance element, and wherein the peripheral circuit of the first substrate includes neither a resistance element nor a capacitance element. 
     
     
         12 . An electronic apparatus, comprising:
 an optical system;   a solid-state imaging device, wherein the solid-state imaging device receives light from the optical system, the solid-state imaging device including:
 a first substrate, the first substrate including:
 a pixel array unit; 
 a peripheral circuit; 
 
 a second substrate, wherein the second substrate is stacked on the first substrate, the second substrate including:
 a peripheral circuit, wherein the peripheral circuit of the second substrate includes at least one of a resistance element or a capacitance element, 
 wherein one of:
 the peripheral circuit of the second substrate includes a resistance element and the peripheral circuit of the first substrate does not include a resistance element, and 
 the peripheral circuit of the second substrate includes a capacitance element and the peripheral circuit of the first substrate does not include a capacitance element, and 
 the peripheral circuit of the second substrate includes both a resistance element and a capacitance element, and wherein the peripheral circuit of the first substrate includes neither a resistance element nor a capacitance element; 
 
 
   a drive circuit, wherein the drive circuit generates timing signals provided to the solid-state imaging device;   a signal processing circuit, wherein the signal processing circuit performs signal processing on an output signal from the solid-state imaging device.   
     
     
         13 . The electronic apparatus of  claim 12 , wherein the peripheral circuit of the second substrate includes a resistance element, and wherein the peripheral circuit of the first substrate does not include a resistance element. 
     
     
         14 . The electronic apparatus of  claim 13 , wherein the first substrate does not include a capacitance element. 
     
     
         15 . The electronic apparatus of  claim 12 , wherein the peripheral circuit of the second substrate includes a capacitance element, and wherein the peripheral circuit of the first substrate does not include a capacitance element. 
     
     
         16 . The electronic apparatus of  claim 12 , wherein the peripheral circuit of the second substrate includes both a resistance element and a capacitance element, and wherein the peripheral circuit of the first substrate includes neither a resistance element nor a capacitance element. 
     
     
         17 . An imaging device, comprising:
 a first substrate;   a second substrate, wherein the first substrate is stacked on the second substrate;   a pixel array unit, wherein the pixel array unit is included in the first substrate;   a comparator, wherein the comparator is included in a first one of the first substrate and the second substrate;   a reference signal supply unit, wherein the reference signal supply unit is included in a second one of the first substrate and the second substrate;   a bias generation circuit, wherein the bias generation unit is included in the second one of the first substrate and the second substrate.   
     
     
         18 . The imaging device of  claim 17 , wherein the comparator is included in the first substrate, wherein the reference signal supply unit and the bias generation circuit are included in the second substrate, wherein the first substrate includes capacitance elements, and wherein the second substrate includes resistance elements. 
     
     
         19 . The imaging device of  claim 18 , wherein the second substrate does not include any capacitance elements. 
     
     
         20 . The imaging device of  claim 17 , wherein the comparator is included in the second substrate, wherein the reference signal supply unit and the bias generation circuit are included in the first substrate, wherein the first substrate includes resistance elements, wherein the second substrate includes capacitance elements, and wherein the second substrate does not include any resistance elements.