US2014231997A1PendingUtilityA1

Semiconductor device and method for manufacturing the same

Assignee: TOSHIBA KKPriority: Feb 21, 2013Filed: Sep 9, 2013Published: Aug 21, 2014
Est. expiryFeb 21, 2033(~6.6 yrs left)· nominal 20-yr term from priority
H10W 20/0234H10W 20/0242H10W 72/9415H10W 72/952H10W 72/942H10W 72/923H10P 95/90H10W 20/4441H10W 20/042H10W 20/023H10W 20/057H10D 64/257H10W 72/00H01L 23/53257H01L 21/76879
50
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device concerning the embodiment includes a semiconductor layer which has a first surface and a second surface which is opposite to the first surface, an interlayer which is provided on the first surface and which consists of only metal whose standard oxidation-reduction potential is not lower than 0 (zero) V in an ionization tendency, and an electrode provided on the interlayer. The semiconductor device further includes an electrical conductive layer which covers an inside of a hole which is formed in the semiconductor layer so as to reach the interlayer the interlayer from the second surface, and which is electrically connected to the electrode via the interlayer which is exposed to a bottom of the hole.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor layer which has a first surface and a second surface which is opposite to the first surface;   an interlayer which is provided on the first surface, and which includes a metal layer consisting of only metal whose standard oxidation-reduction potential is not lower than 0 (zero) V in an ionization tendency;   an electrode provided on the interlayer; and   an electrical conductive layer which covers an inside of a hole which is formed in the semiconductor layer so as to reach the interlayer from the second surface, and which is electrically connected to the electrode via the interlayer which is exposed to a bottom of the hole.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the metal layer of the interlayer consists of platinum (Pt). 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the metal layer of the interlayer consists of one metal or plural metals selected from a group consisting of copper (Cu), palladium (Pd), platinum (Pt), and gold (Au). 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the interlayer contains the metal layer and a reaction layer which is formed by reaction of the metal layer and the semiconductor layer, and the electrical conductive layer is in contact with the reaction layer. 
     
     
         5 . The semiconductor device according to  claim 4 , wherein the interlayer contains a platinum layer and the reaction layer which is formed by reaction of the platinum layer and the semiconductor layer, and the electrical conductive layer is in contact with the reaction layer. 
     
     
         6 . The semiconductor device according to  claim 1 , further comprising a functional part which is electrically connected to the electrode, and wherein the interlayer is separated from the functional part. 
     
     
         7 . A method for manufacturing a semiconductor device, comprising:
 forming a metal layer consisting of only metal whose standard oxidation-reduction potential is not lower than 0 (zero) V in an ionization tendency on a first surface of a semiconductor layer;   forming a reaction layer by heat-treating the metal layer and the semiconductor layer;   forming an electrode on the metal layer;   exposing at least one of the reaction layer and the metal layer to the second surface of the semiconductor layer which is opposite to the first surface by forming a hole which penetrates the semiconductor layer in the direction facing to the electrode from the second surface; and   forming an electrical conductive layer which covers the inside of the hole and is electrically connected to the electrode.   
     
     
         8 . The method for making semiconductor device according to  claim 7 , wherein the metal layer is a platinum layer.

Join the waitlist — get patent alerts

Track US2014231997A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.