Operating system based dram and flash management

Abstract

A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the one or more FLASH devices.

What is claimed is: 
     
         1 . A system, comprising:
 a memory that has stored thereon computer-executable components; and   a processor that executes the following computer-executable components stored in the memory:
 an allocation component that allocates a page from a main storage device to a page buffer and allocates a buffer page for a write reference associated with a cache hit in response to a write major page fault, wherein the allocation component determines whether a particular page is allocated to the page buffer in response to a minor page fault; and 
 a management component that generates a mapping to the particular page in response to a determination that the particular page is allocated to the page buffer, wherein another page is allocated to a buffer component and the particular page is demapped in response to a determination that the particular page is not allocated to the page buffer. 
   
     
     
         2 . The system of  claim 1 , wherein the allocation component allocates pages to at least one of a memory device or the page buffer based on a type of page fault. 
     
     
         3 . The system of  claim 1 , wherein the allocation component allocates a page associated with defined protection from the main storage device to a memory device in response to a read major page fault. 
     
     
         4 . The system of  claim 1 , further comprising an address match component that compares a plurality of incoming addresses and determines whether a data return is directed to the page buffer or a memory device based on a program-erase cycle of the memory device. 
     
     
         5 . The system of  claim 1 , further comprising a kernel component that detects when the page is fetched from one or more memory devices. 
     
     
         6 . The system of  claim 5 , wherein the buffer component temporarily stores the page while the page is being stored on the one or more memory devices. 
     
     
         7 . The system of  claim 5 , further comprising a read or write detection component that facilitates access to the one or more memory devices. 
     
     
         8 . The system of  claim 7 , wherein the read or write detection component allocates pages to the one or more memory devices in response to a determination that a read is detected. 
     
     
         9 . The system of  claim 8 , wherein the read or write detection component sets a copy-on-write flag in response to a determination that the read is detected. 
     
     
         10 . The system of  claim 8 , wherein the read or write detection component allocates a DRAM page in response to a determination that a write is detected. 
     
     
         11 . A method, comprising:
 allocating a page from a main storage device to a buffer device and allocating a buffer page for a write reference associated with a cache hit in response to a write major page fault;   determining whether an existing page is allocated to the buffer device in response to a minor page fault;   generating a mapping to the existing page in response to the existing page being allocated to the buffer device; and   allocating another page to the buffer device and demapping the existing page in response to the existing page not being allocated to the buffer device.   
     
     
         12 . The method of  claim 11 , further comprising allocating a page marked with a defined protection from the main storage device to a memory device in response to a read major page fault. 
     
     
         13 . The method of  claim 11 , further comprising adapting a kernel component to employ one or more memory devices and one or more other memory devices as program memory for a computer. 
     
     
         14 . The method of  claim 13 , further comprising triggering at least one update to the one or more memory devices and the one or more other memory devices based on the write major page fault and the minor page fault. 
     
     
         15 . The method of  claim 14 , further comprising directing a controller to interleave the at least one update among the one or more memory devices and the one or more other memory devices. 
     
     
         16 . The method of  claim 11 , further comprising allocating a FLASH device in response to a read operation or allocating a DRAM page in response to a write operation. 
     
     
         17 . A non-transitory computer-readable storage medium comprising computer-readable instructions that, in response to execution, cause a computing system to perform operations, comprising:
 allocating a page from a storage device to a buffer and allocating a buffer page for a write reference associated with a cache hit in response to a write major page fault;   determining whether an particular page is allocated to the buffer in response to a minor page fault;   establishing a mapping to the particular page in response to the particular page being allocated to the buffer; and   allocating another page to the buffer and demapping the particular page in response to the particular page not being allocated to the buffer.   
     
     
         18 . The non-transitory computer-readable storage medium of  claim 17 , further comprising allocating a page associated with write protection from the storage device to a memory device in response to a read major page fault. 
     
     
         19 . The non-transitory computer-readable storage medium of  claim 17 , further comprising differentiating allocation of pages based in part on whether a fault is a major fault or a minor fault. 
     
     
         20 . The non-transitory computer-readable storage medium of  claim 17 , further comprising allocating pages to a memory and the buffer based in part on a detected read operation or a detected write operation.