US2014223113A1PendingUtilityA1

Selector syncronized with movement of data in memory

Individually held — no corporate assignee on recordPriority: Jul 18, 2011Filed: Feb 3, 2012Published: Aug 7, 2014
Est. expiryJul 18, 2031(~5 yrs left)· nominal 20-yr term from priority
Inventors:Ted A. Hadley
G06F 21/55G06F 13/1642G06F 1/24G06F 21/602G06F 21/57G06F 21/575G06F 21/72G06F 13/1663G06F 21/74G01R 31/31719G06F 2221/2143G09C 1/00G06F 21/78G06F 21/79H04L 9/088H04L 9/32G06F 21/54H04L 2209/12
55
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

In one implementation, data values having an order are stored at a memory having a plurality of memory locations. Data values are periodically moved between memory locations according to a movement pattern. A selector is synchronized with the movement of the data values according to the movement pattern to select an output.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus, comprising:
 a memory having a plurality of memory locations;   a controller operatively coupled to the memory to store data values, having an order, from a data set at the memory and to periodically move data values between memory locations according to a movement pattern;   the controller further operatively coupled to a selector, synchronized with the movement of the data values according to the movement pattern, to select an output.   
     
     
         2 . The apparatus of  claim 1 , where the selector includes:
 a plurality of switches, the state of the switches corresponding to the state of the position of the data values in memory.   
     
     
         3 . The apparatus of  claim 1 , wherein the selector includes:
 a plurality of multiplexers, the multiplexers to output the data values in memory in the order regardless of the data values' position in memory.   
     
     
         4 . The apparatus of  claim 3 , wherein the number of multiplexers corresponds to the number of the memory locations. 
     
     
         5 . The apparatus of  claim 1 , wherein data values are moved between mere y locations via control signals, the control signals further to control the selector. 
     
     
         6 . The apparatus of  claim 3 , further including:
 an encryption engine to selectively enable output of one of the plurality of multiplexers and to disable output from the other of the plurality of multiplexers.   
     
     
         7 . The apparatus of  claim 6 , wherein the encryption engine includes a latch to store the output from the enabled one of the plurality of multiplexers. 
     
     
         8 . The apparatus of  claim 1 , wherein the movement pattern rotates the data values randomly through the plurality of memory locations. 
     
     
         9 . The apparatus of  claim 1 , wherein the movement pattern rotates the data values non-sequentially through the plurality of memory locations in accordance with a permutation. 
     
     
         10 . A processor-readable medium storing code representing instructions to cause a processor to perform a process, the process to:
 store a data set at a memory having a plurality of memory locations, the data set including an plurality of data values having an order, each data value from the data set stored a current memory location of that data value from the plurality of memory locations;   periodically move each data value between the plurality of memory locations in accordance with a movement pattern;   adjust a selector in synchronization with the movement pattern; and   provide the plurality of data values via the selector in the order in response to a request for the data set.   
     
     
         11 . The processor-readable medium of  claim 10 , wherein the process to adjust the selector includes:
 adjust a plurality of switches, the state of the switches corresponding to the of the position of the data values in memory.   
     
     
         12 . The processor-readable medium of  claim 10 , wherein the process to adjust the selector includes:
 adjust a plurality of multiplexers, the multiplexers to provide the data values in memory in the order regardless of the data values' position in memory.   
     
     
         13 . The processor-readable medium of  claim 11 , wherein the number of multiplexers corresponds to the number of the memory locations. 
     
     
         14 . The processor-readable medium of  claim 10 , wherein the movement pattern is one of a time-dependent permutation, rotates the data values sequentially through the plurality of memory locations, rotates the data values non-sequentially through the plurality of memory locations in accordance with a permutation or rotates the data values randomly through the plurality of memory locations. 
     
     
         15 . A method, comprising:
 storing a data set at a memory having a plurality of memory locations, the data set including an plurality of data values having an order, each data value from the data set stored a current memory location of that data value from the plurality of memory locations;   periodically moving each data value between the plurality ref memory locations in accordance with a movement pattern:   adjusting a selector in synchronization with the movement pattern; and   provide the plurality of data values via the selector in the order in response to a request for the data set.

Join the waitlist — get patent alerts

Track US2014223113A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.