Planar semiconductor growth on iii-v material

Abstract

A semiconductor structure includes a III-V monocrystalline layer and a germanium surface layer. An interlayer is formed directly between the III-V monocrystalline layer and the germanium surface layer from a material selected to provide stronger nucleation bonding between the interlayer and the germanium surface layer than nucleation bonding that would be achievable directly between the III-V monocrystalline layer and the germanium surface layer such that a continuous, relatively defect-free germanium surface layer is provided.

1 . A method for fabricating a semiconductor structure, comprising:
 forming a source and drain region for a device in a III-V monocrystalline layer;   removing impurities from the III-V monocrystalline layer;   forming an interlayer directly on the III-V monocrystalline layer over the source and drain regions from a material selected to provide stronger nucleation bonding between the interlayer and a germanium surface layer than nucleation bonding that would be achievable directly between the III-V monocrystalline layer and the germanium surface layer; and   growing a crystalline germanium surface layer directly on the interlayer to form a source and drain extension for the respective source and drain regions of the device, such that a continuous, relatively defect-free germanium surface layer is provided.   
     
     
         2 . The method as recited in  claim 1 , wherein removing impurities includes baking the III-V monocrystalline layer at a temperature of between 500 and 800 degrees C. 
     
     
         3 . The method as recited in  claim 2 , wherein baking includes subjecting the III-V monocrystalline layer to a reactive chemical flow. 
     
     
         4 . The method as recited in  claim 1 , further comprising treating the interlayer before forming the germanium surface layer by baking the interlayer layer at a temperature of between 450 and 600 degrees C. 
     
     
         5 . The method as recited in  claim 4 , wherein baking the interlayer layer includes subjecting the interlayer layer to a reactive chemical flow to remove impurities. 
     
     
         6 . The method as recited in  claim 1 , wherein growing the germanium surface layer includes depositing the germanium surface layer with GeH4 at a temperature between 400 and 425 degrees C. at a pressure of between about 50 mT and 250 mT. 
     
     
         7 . The method as recited in  claim 1 , wherein the III-V monocrystalline layer includes one of GaAs, InP, GaP, GaN, GaSb and alloys thereof and the interlayer includes one of P, As, Ga, Si or combinations thereof. 
     
     
         8 . The method as recited in  claim 1 , wherein forming the interlayer includes forming a thickness of less than about 20 nm. 
     
     
         9 . The method as recited in  claim 1 , wherein the germanium surface layer includes a defect density of less than 109/cm2. 
     
     
         10 . The method as recited in  claim 1 , wherein the semiconductor structure includes a transistor device, the III-V monocrystalline layer forms source and drain regions of the transistor and growing the germanium surface layer directly on the interlayer includes forming contacts to the source and drain regions. 
     
     
         11 . The method as recited in  claim 1 , wherein the germanium surface layer includes an alloy of germanium. 
     
     
         12 . A method for fabricating a transistor device, comprising:
 forming a channel, source, and drain region in a III-V monocrystalline layer;   removing impurities from the III-V monocrystalline layer;   forming an interlayer directly on the III-V monocrystalline layer only over the source and drain regions from a material selected to provide stronger nucleation bonding between the interlayer and a germanium surface layer than nucleation bonding that would be achievable directly between the III-V monocrystalline layer and the germanium surface layer; and   growing a crystalline germanium surface layer directly on the interlayer to form a source and drain extension for the respective source and drain regions, such that a continuous, relatively defect-free germanium surface layer is provided; and   forming conductive metal contacts directly on the source and drain extensions.