Data storage device including current detector

Abstract

Provided is a data storage device including a current detector. The data storage device includes a plurality of memory devices, a detector, and a power manager. The detector detects a current inputted from a power source. The power manager manages consumption power of the plurality of memory devices according to a result of the detection provided from the detector.

1 .- 2 . (canceled) 
     
     
         3 . A data storage device comprising:
 a plurality of flash memory devices;   a detector configured to detect a status of power supplied from an external power source; and   a memory controller exchanging data with the plurality of flash memory devices through a plurality of channels, and configured to decide an operation mode of the plurality of flash memory devices according to a result of a detection provided from the detector,   wherein the memory controller stops an operation of the plurality of flash memory devices in response to the result of the detection.   
     
     
         4 . The data storage device of  claim 3 , wherein the memory controller decide the operation mode to a stop mode when the status of power corresponds to a predetermined level. 
     
     
         5 . The data storage device of  claim 4 , wherein the memory controller stops access operation to the plurality flash memory devices when the decided operation mode corresponds to the stop mode. 
     
     
         6 . The data storage device of  claim 3 , wherein the memory controller comprise:
 a power manager configured to determine the operation mode, whether to stop the operation of the plurality of flash memory devices; and   an SSD controller configured to control the plurality of flash memory devices in response to the operation mode.   
     
     
         7 . The data storage device of  claim 3 , further comprising:
 a buffer memory configured to temporarily store exchanging data between the memory controller and the plurality of flash memory devices.   
     
     
         8 . The data storage device of  claim 3 , wherein the detector monitoring voltage or current of the power supplied from the external power source. 
     
     
         9 . A method of operating a data storage device, the method comprising:
 detecting a status of power supplied from an external;   determining whether to stop an operation of a plurality of flash memory devices or maintain the operation of the plurality of flash memory devices in response to the status of power supplied from the external; and   stopping the operation of the plurality of flash memory devices when a stop mode is determined.   
     
     
         10 . The method of  claim 9 , wherein the status of power comprises a current or voltage level supplied from the external. 
     
     
         11 . The method of  claim 9 , wherein the operation of the plurality of flash memory device comprises partial operation mode and wait command execution mode. 
     
     
         12 . The method of  claim 9 , wherein when the stop mode is selected as the operation mode, stopping one or more environments to drive the data storage device. 
     
     
         13 . A data storage device comprising:
 a plurality of flash memory devices;   a detector configured to detect a status of power supplied from an external power source; and   a memory controller exchanging data with the plurality of flash memory devices through a plurality of channels, and configured to stop an operation of the plurality of flash memory devices in response to the result of the detection,   wherein the memory controller changes an operation mode according to a command pattern of the one or more external commands which are inputted from the external,   wherein the operation mode comprises a low power mode which comprises a partial operation mode and a stop mode.   
     
     
         14 . The data storage device of  claim 13 , wherein when the command pattern corresponds to a predetermined pattern, the memory controller changes the operation mode to the stop mode. 
     
     
         15 . The data storage device of  claim 14 , wherein when the stop mode is selected as the operation mode, the memory controller stops an access operation of the plurality of flash memory devices. 
     
     
         16 . The data storage device of  claim 13 , wherein when the partial mode is selected as the operation mode, the memory controller divide the execution corresponding to the one or more external commands into a plurality of steps and executing the respective steps in sequence. 
     
     
         17 . The data storage device of  claim 13 , wherein when the partial mode is selected as the operation mode, the memory controller reduces at least one of bandwidth of the plurality of channels, a number of flash memory devices for way interleaving and clock frequency of the plurality of channels. 
     
     
         18 . The data storage device of  claim 13 , further comprising:
 a buffer memory configured to temporarily store exchanging data between the memory controller and the plurality of flash memory devices.   
     
     
         19 . A method of operating a data storage device, the method comprising:
 detecting a command pattern of one or more external commands which are inputted from an external;   determining whether the command pattern corresponds to a plurality of predetermined patterns; and   stopping the operation of a plurality of flash memory devices when the command pattern corresponds to a first predetermined pattern.   
     
     
         20 . The method of  claim 19 , wherein when the command pattern corresponds to a second predetermined pattern, dividing an execution corresponding to the one or more external commands into a plurality of steps and executing the respective steps in sequence. 
     
     
         21 . The method of  claim 19 , wherein when the command pattern corresponds to a second predetermined pattern, reducing a bandwidth of plurality of channels which are connected to the plurality of flash memory devices. 
     
     
         22 . The method of  claim 19 , wherein when the command pattern corresponds to a second predetermined pattern, reducing a number of flash memory devices for way interleaving or clock frequency of a plurality of channels connected to the plurality of flash memory devices. 
     
     
         23 . The method of  claim 19 , further comprising:
 detecting a status of power supplied from the external; and   determining whether to stop an operation of a plurality of flash memory devices or maintain the operation of the plurality of flash memory devices in response to the status of power supplied from the external.   
     
     
         24 . A method of operating a data storage device, comprising:
 forecasting a peak current of operation of the data storage device; and   controlling at least one operation mode of the data storage device so as to not exceed a predetermined limit current value.   
     
     
         25 . The method of  claim 24 , further comprising:
 detecting a current level supplied from a power source to the data storage device.   
     
     
         26 . The method of  claim 25 , wherein the at least one operation mode of the storage device comprises a plurality of low power modes adjusting the consumption power to a specific level or less according to the result of the detection. 
     
     
         27 . The method of  claim 26 , when the current level exceeds the predetermined limit current value, controlling the data storage device with a controller and driving the data storage device in one of the plurality of low power modes. 
     
     
         28 . The method of  claim 26 , wherein the plurality of low power modes comprise a wait mode delaying an execution of a command temporarily, a partial operation mode executing the command partially, and a stop mode pausing an operation of the data storage device. 
     
     
         29 . The method of  claim 24 , further comprising
 detecting a command pattern of one or more external commands which are inputted from an external.   
     
     
         30 . The method of  claim 29 , wherein when the detected command pattern corresponds to hard operation pattern, the operation mode is switched to one of a plurality of low power modes. 
     
     
         31 . The method of  claim 30 , wherein a plurality of low power modes comprise a wait mode delaying an execution of a command temporarily, a partial operation mode executing the command partially, and a stop mode pausing an operation of the data storage device. 
     
     
         32 . A solid state drive comprising:
 a plurality of flash memory devices;   a detector configured to detect a status of power supplied from an external power source;   an SSD controller exchanging data with the plurality of flash memory devices through a plurality of channels, and configured to decide an operation mode of the plurality of flash memory devices according to a result of a detection provided from the detector; and   a buffer memory configured to temporarily store exchanging data between the SSD controller and the plurality of flash memory devices,   wherein the SSD controller stops an operation of the plurality of flash memory devices in response to the result of the detection.   
     
     
         33 . The solid state drive of  claim 32 , wherein the SSD controller decides the operation mode to a stop mode when the status of power corresponds to a predetermined level. 
     
     
         34 . The solid state drive of  claim 33 , wherein the SSD controller stops access operation to the plurality flash memory devices when the decided operation mode corresponds to the stop mode. 
     
     
         35 . The solid state drive of  claim 32 , wherein the SSD controller comprises a power manager configured to determine the operation mode, whether to stop the operation of the plurality of flash memory devices. 
     
     
         36 . The solid state drive of  claim 32 , wherein the detector monitoring voltage or current of the power supplied from the external power source. 
     
     
         37 . A solid state drive comprising:
 a plurality of flash memory devices;   a detector configured to detect a status of power supplied from an external power source;   an SSD controller exchanging data with the plurality of flash memory devices through a plurality of channels, and configured to stop an operation of the plurality of flash memory devices in response to the result of the detection; and   a buffer memory configured to temporarily store exchanging data between the SSD controller and the plurality of flash memory devices,   wherein the SSD controller changes an operation mode according to a command pattern of the one or more external commands which are inputted from the external,   wherein the operation mode comprises a low power mode which comprises a partial operation mode and a stop mode.   
     
     
         38 . The solid state drive of  claim 37 , wherein when the command pattern corresponds to a predetermined pattern, the SSD controller changes the operation mode to the stop mode. 
     
     
         39 . The solid state drive of  claim 38 , wherein when the stop mode is selected as the operation mode, the SSD controller stops an access operation of the plurality of flash memory devices. 
     
     
         40 . The solid state drive of  claim 37 , wherein when the partial mode is selected as the operation mode, the SSD controller divide the execution corresponding to the one or more external commands into a plurality of steps and executing the respective steps in sequence. 
     
     
         41 . The solid state drive of  claim 37 , wherein when the partial mode is selected as the operation mode, the SSD controller reduces at least one of bandwidth of the plurality of channels, a number of flash memory devices for way interleaving and clock frequency of the plurality of channels. 
     
     
         42 . A computing system, comprising: a data storage device, including:
 at least one memory device; and   a memory controller to exchange data with the plurality of memory devices in response to one or more external commands, the memory controller to change an operation mode according to a pattern of the one or more external commands that are successively inputted;   a processor to request data to be stored and to be retrieved from the data storage device; and   a system bus to communicatively couple the data storage device and the processor.   
     
     
         43 . A computing system, comprising:
 a data storage device, including:   at least one memory device;   a detector to detect a current inputted from a power source; and   a power manager to manage consumption power of the plurality of memory devices according to a result of the detection provided from the detector;   a processor to request data to be stored and to be retrieved from the data storage device; and   a system bus to communicatively couple the data storage device and the processor.