US2014210052A1PendingUtilityA1
Semiconductor Device and Method for Manufacturing a Semiconductor Device
Est. expiryNov 29, 2030(~4.3 yrs left)· nominal 20-yr term from priority
H10D 84/645H10D 62/184H10D 10/061H10D 10/60H01L 27/082H01L 29/735H01L 29/6625
52
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Claims
Abstract
According to an embodiment, a method for manufacturing a semiconductor device is provided. The method includes providing a mask layer which is used as an implantation mask when forming a doping region and which is used as an etching mask when forming an opening and a contact element formed in the opening. The contact element is in contact with the doping region.
Claims
exact text as granted — not AI-modified1 - 10 . (canceled)
11 . A semiconductor device, comprising:
a semiconductor substrate having a first surface and a first doping region; a first insulating layer on the first surface of the semiconductor substrate, the first insulating layer having a first opening arranged above the first doping region; a mask layer on the first insulating layer and having a first opening, the first opening in the first insulating layer and the first opening in the mask layer being laterally centred with respect to the first doping region; a second insulating layer on the mask layer and having a first opening above the first opening of the mask layer; and at least a first contact element arranged in the first opening of the second insulating layer, the first opening of the mask layer and the first opening of the first insulating layer, the first contact element electrically connecting the first doping region with the mask layer.
12 . A semiconductor device according to claim 11 , wherein the semiconductor substrate further comprises a doping area of a first conductivity type, wherein the first doping region is of a second conductivity type and arranged in the doping area of the semiconductor substrate.
13 . A semiconductor device according to claim 11 , wherein the mask layer comprises an electrically conductive material.
14 . A semiconductor device according to claim 13 , wherein the contact element comprises a conductive material different than the conductive material of the mask layer.
15 . A semiconductor device according to claim 11 , wherein the semiconductor device is a first bipolar transistor and the first doping region forms an emitter region of the bipolar transistor.
16 . A semiconductor device according to claim 15 , further comprising a second bipolar transistor having an emitter region and a contact element in electrical contact with the emitter region of the second bipolar transistor, wherein the mask layer electrically connects the first contact element of the first bipolar transistor with the contact element of the second bipolar transistor.
17 . A semiconductor device according to claim 11 , further comprising a contact doping region arranged in the first doping region, the contact doping region having the same conductivity type as the first doping region and a higher doping concentration than the first doping region, the contact doping region being laterally centred with respect to the mask layer.
18 . A method for manufacturing a semiconductor device, comprising:
providing a semiconductor substrate having a first surface, a first doping region and a second doping region laterally spaced from the first doping region, a first insulating layer on the first surface of the semiconductor substrate, and a conductive mask layer having at least a first opening and a second opening spaced apart from the first opening on the first insulating layer, the first opening of the conductive mask layer being arranged above the first doping region and the second opening of the conductive mask layer being arranged above the second doping region; forming a second insulating layer on the conductive mask layer to cover the first and second openings in the conductive mask layer, the material of the first and second insulating layers being selectively etchable with respect to the material of the conductive mask layer; forming an etching mask on the second insulating layer for defining a first opening and a second opening of the second insulating layer; etching the second insulating layer selectively with respect to the etching mask and the conductive mask layer to form the first opening and the second opening of the second insulating layer, the first opening of the second insulating layer exposing the first opening in the conductive mask layer and the second opening of the second insulating layer exposing the second opening in the conductive mask layer; etching the first insulating layer using the conductive mask layer as an etching mask to form a first and a second opening in the first insulating layer for exposing at least a respective portion of the first and second doping regions; and depositing a conductive material to form a first contact element disposed in the first opening formed in the first insulating layer, in the first opening formed in the second insulating layer and in the first opening formed in the conductive mask layer, and a second contact element disposed in the second opening formed in the first insulating layer, in the second opening formed in the second insulating layer and in the second opening formed in the conductive mask layer, the first contact element being in electrical contact with the first doping region and the conductive mask layer, and the second contact element being in electrical contact with the second doping region and the conductive mask layer.
19 . A method according to claim 18 , wherein the first opening in the conductive mask layer defines a location of the first doping region, and the second opening in the conductive mask layer defines a location of the second opening; the method further comprising:
performing an implantation step using the conductive mask layer as an implantation mask to form the first doping region and the second doping region in the semiconductor substrate.
20 . A method according to claim 18 , further comprising:
forming a first metallization region and a second metallization region spaced apart from the first metallization region on the second insulating layer, the first metallization region being in electrical contact with the first contact element and the second metallization region being in electrical contact with the second contact element.
21 . A semiconductor device, comprising:
a semiconductor substrate having a first surface, a first doping region and a second doping region laterally spaced apart from the first doping region; a first insulating layer on the first surface of the semiconductor substrate and having a first opening and a second opening; a conductive mask layer on the first insulating layer and having a first opening and a second opening, the first opening of the conductive mask layer being arranged above the first opening of the first insulating layer and the second opening of the conductive mask layer being arranged above the second opening of the first insulating layer; a second insulating layer on the conductive mask layer and having a first opening and a second opening, the first opening of the second insulating layer arranged above the first opening of the conductive mask layer, and the second opening of the second insulating layer arranged above the second opening of the conductive mask layer; a first contact element disposed in the first opening of the first insulating layer, the first opening of the conductive mask layer and the first opening of the second insulating layer, the first contact element being in electrical contact with the first doping region and the conductive mask layer; and a second contact element disposed in the second opening of the first insulating layer, the second opening of the conductive mask layer and the second opening of the second insulating layer, the second contact element being in electrical contact with the second doping region and the conductive mask layer.
22 . A semiconductor device according to claim 21 , further comprising:
a first metallization region and a second metallization region spaced apart from the first metallization region on the second insulating layer, the first metallization region being in electrical contact with the first contact element and the second metallization region being in electrical contact with the second contact element.
23 . A semiconductor device according to claim 21 , wherein the first doping region is laterally centred with respect to the first opening of the conductive mask layer and the second doping region is laterally centred with respect to the second opening of the conductive mask layer.
24 . A semiconductor device according to claim 21 , wherein the first and second insulating layers are in contact with each other in regions outside of the conductive mask layer, the first and second insulating layers having a third opening and a third contact element spaced apart from the first and the second contact elements.
25 . A semiconductor device, comprising:
a semiconductor substrate having a first surface, a doping area of a first conductivity type, a first doping region of a second conductivity type arranged in the doping area, and a contact doping region of the second conductivity type arranged in the first doping region at the first surface, the contact doping region having a higher doping concentration than the first doping region; a first insulating layer on the first surface of the semiconductor substrate, the first insulating layer having a first opening above the contact doping region; a mask layer on the first insulating layer and having a first opening, the first opening in the first insulating layer and the first opening in the mask layer being laterally centred with respect to the contact doping region; a second insulating layer on the mask layer and having a first opening above the first opening of the mask layer; and at least one contact element arranged in the first opening of the second insulating layer, in the first opening of the mask layer and in the first opening of the first insulating layer, the contact element electrically connecting the contact doping region with the mask layer.Join the waitlist — get patent alerts
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